AS29LV800 ANADIGICS Inc, AS29LV800 Datasheet

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... ALLIANCE SEMICONDUCTOR AS29LV800 write lock-out below 1.5V CC 48-pin TSOP 44-pin SO RY/BY 1 A18 2 A17 AS29LV800 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 22 Unit 120 ns 120 Copyright © ...

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... AS29LV800 Functional description The AS29LV800 megabit, 3.0 volt only Flash memory organized as 1 Megabyte of 8 bits/512Kbytes of 16 bits each. For flexible erase and program capability, the 8 megabits of data is divided into nineteen sectors: one 16K, two 8K, one 32K, and fifteen 64k byte sectors; or one 8K, two 4K, one 16K, and fifteen 32K word sectors. The ×8 data appears on DQ0–DQ7; ...

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... X = don’t care. ID with DQ8-DQ14 in high Z and DQ15 = A-1. IL ID. (9.5V–10.5V enabling outputs. ) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash ), D represents the device code for the AS29LV800. IH OUT ACC reduced to <1.0 µA when ALLIANCE SEMICONDUCTOR AS29LV800 ...

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... In word mode, there are one 8K word, two 4K word, one 16K word, and fifteen 32K word sectors. Address range is A18–A-1 if BYTE = V is A18–A0 if BYTE = ® 1 µA). Recovery time to start of first read cycle is < Top boot sector architecture (AS29LV800T) Size ×16 (Kbytes) 16 00000h–0FFFFh 8 10000h–1FFFFh 8 20000h– ...

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... A18–A12 X ×8 T boot X ×8 B boot X ×16 T boot X ×16 B boot X Sector address ALLIANCE SEMICONDUCTOR AS29LV800 Top boot sector address (AS29LV800T) A17 A16 A15 A14 A13 ...

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... AS29LV800 Command format Required 1st bus cycle Command bus write sequence cycles Address Reset/Read 1 XXXh ×16 555h Reset/ 3 Read ×8 AAAh ×16 555h ×8 AAAh ×16 555h Autoselect ×8 AAAh 3 ID Read ×16 555h ×8 AAAh ×16 555h Program 4 ×8 AAAh × ...

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... Upon execution of the program command, no additional CPU controls or timings are necessary. Addresses are latched on the falling edge WE, whichever is last; data is latched on the rising edge WE, whichever is first. The AS29LV800’s automated on-chip program algorithm provides adequate internally-generated programming pulses and verifies the programmed cell margin ...

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... AS29LV800 to read mode, and the device ignores the sector erase command string. Erase such ignored sectors by restarting the Sector Erase command on the ignored sectors. The entire array need not be written with 0s prior to erasure. AS29LV800 writes 0s to the entire sector prior to electrical erase; writing of 0s affects only selected sectors, leaving non-selected sectors unaffected ...

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... Erase Suspend address of a sector not being erased, or poll RY/BY. Check DQ2 in conjunction with DQ6 to determine if a sector is being erased. AS29LV800 ignores redundant writes of Erase Suspend. While in erase-suspend mode, AS29LV800 allows reading data (erase-suspend-read mode) from or programming data (erase-suspend-program mode) to any sector not undergoing sector erase; ...

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... AS29LV800 Status operations Only active during automated on-chip algorithms or sector erase time outs. DQ7 reflects complement of data last written when read during the automated on-chip program algorithm (0 DATA polling (DQ7) during erase algorithm); reflects true data when read after completion of an automated on-chip program algorithm (1 after completion of erase agorithm) ...

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... The system software should check the status of DQ3 prior to and following each subsequent sector erase command to ensure command completion. The device may not have accepted the command if DQ3 is high on second status check. ALLIANCE SEMICONDUCTOR AS29LV800 START Write erase command sequence (see below) ...

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... AS29LV800 Programming using unlock bypass command START Write unlock bypass command (3 cycles) Write unlock bypass program command (2 cycles) DATA polling or toggle bit successfully completed Increment address Last NO address? YES Write unlock bypass reset command (2 cycles) Programming completed 12 ® Unlock bypass command sequence ...

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... DID 11-40002-A. 10/19/00 ® Toggle bit algorithm † YES DONE † YES DONE † DQ6 rechecked even if DQ5 = 1 because DQ6 may stop toggling when DQ5 changes to 1. ALLIANCE SEMICONDUCTOR AS29LV800 Read byte (DQ0–DQ7) Address = don’t care DQ6 NO = DONE toggle ? YES DQ5 NO = ...

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... AS29LV800 Sector protect algorithm START PLSCNT = 1 RESET Wait 1 µs No First Write Temporary sector unprotect mode Cycle=60h? Yes Set up sector address Sector protect: write 60h to sector address with A6=0, A1=1, A0=0 Wait 150 µs Verify sector protect; write 40h to sector address Increment with A6=0, PLSCNT ...

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... 0.3V 0. 0.3V, RESET = V CC RESET = 0. 4.0mA MIN I = -2.0 mA MIN LKO ID ALLIANCE SEMICONDUCTOR AS29LV800 V = 2.7–3.6V CC Min Max - ± ±1 CC MAX - 20 - 100 - -0.5 0.8 0.7× 0 0.45 0.85× 1 ...

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... AS29LV800 AC parameters — read cycle JEDEC Std Symbol Symbol Parameter t t Read cycle time AVAV Address to output delay AVQV ACC t t Chip enable to output ELQV Output enable to output GLQV OE t Output enable setup time OES t t Chip enable to output High Z ...

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... AS Program address GHWL OES WHWH1 WPH t DH Program data t DS ALLIANCE SEMICONDUCTOR AS29LV800 WE controlled -90 -120 Min Max Min Max Unit 90 - 120 - ...

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... AS29LV800 AC parameters — write cycle 2 JEDEC Symbol Std Symbol Parameter t t Write cycle time AVAV Address setup time AVEL Address hold time ELAX Data setup time DVEH Data hold time EHDX DH Read recover time before t t GHEL ...

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... Min Max 500 - - READY status valid data t AS 2AAh 555h 555h WPH t DH 55h 80h AAh ALLIANCE SEMICONDUCTOR AS29LV800 -90 -120 Min Max Min Max 500 - 500 - VIDR -90 -120 Min Max Min Max 500 - 500 - - 50 - ...

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... AS29LV800 AC Parameters — READY/BUSY JEDEC Symbol Std Symbol Parameter - t V setup time VCS CC Recovery time from RY/ Program/erase valid to RY/BY delay - t BUSY RY/BY waveform CE WE RY/ VCS DATA polling waveform OEH WE DQ7 Input DQ7 Toggle bit waveform CE t OEH WE OE DQ6 ...

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... Address input t FHQV t SET and t specifications Valid* Don’t care 60h Don’t care Sector protect: 100 µs Sector unprotect For sector protect, A6=0, A1=1, A0=0. For sector unprotect, A6=1, A1=1, A0=0. ALLIANCE SEMICONDUCTOR AS29LV800 -90 -120 Min Max Min Max Unit - ...

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... AS29LV800 AC test conditions Device under test Test specifications Test Condition Output Load Output Load Capacitance C (including jig capacitance) L Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels Erase and programming performance Parameter ...

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... Symbol OPR T STG I OUT Test setup OUT Test setup OUT ALLIANCE SEMICONDUCTOR AS29LV800 Min Max –0 0.5 CC –0.5 +12.5 -0.5 +4.0 –55 +125 –65 +150 - 150 Typ Max Unit 6 7 Typ Max Unit 6 7 ...

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... TSOP, 12×20 mm, 48-pin AS29LV800B-80TC Bottom boot configuration AS29LV800B-80TI SO, 13.3 mm, 44-pin AS29LV800T-80SC Top boot configuration AS29LV800T-80SI SO, 13.3 mm, 44-pin AS29LV800B-80SC Bottom boot configuration AS29LV800B-80SI AS29LV800 part numbering system AS29LV 800 X 3V Flash Device T= Top boot configuration EEPROM number B= Bottom boot configuration prefix 24 DID 11-40002-A. Copyright ©1998 Alliance Semiconductor. All rights reserved. Alliance Semiconductor corporation reserves the right to make changes in this document at any time to improve design and supply the best product possible. Publication of information does not constitute commitment to produce or supply the product described ...