74ACT251PC Fairchild Semiconductor, 74ACT251PC Datasheet - Page 2

• Manufacturer Part Number: 74ACT251PC
• Description: IC MULTIPLEXER 8BIT 16-DIP
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTr
• Type: Multiplexerr

Specifications of 74ACT251PC

• Circuit: 1 x 8:1
• Independent Circuits: 1
• Current - Output High, Low: 24mA, 24mA
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Logical Function: Mux
• Configuration: 1 x 8:1
• Number Of Inputs: 8
• Number Of Outputs: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 16
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74ACT251

www.fairchildsemi.com
Functional Description
This device is a logical implementation of a single-pole, 8-
position switch with the switch position controlled by the
state of three Select inputs, S
plementary outputs are provided. The Output Enable input
(OE) is active LOW. When it is activated, the logic function
provided at the output is:
Z
When the Output Enable is HIGH, both outputs are in the
high impedance (High Z) state. This feature allows multi-
plexer expansion by tying the outputs of up to 128 devices
together. When the outputs of the 3-STATE devices are
tied together, all but one device must be in the high imped-
ance state to avoid high currents that would exceed the
maximum ratings. The Output Enable signals should be
designed to ensure there is no overlap in the active-LOW
portion of the enable voltages.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
OE •
(I
I
I
I
2
4
6
0
• S
• S
• S
• S
0
0
0
0
• S
• S
• S
• S
1
1
1
1
• S
• S
• S
• S
2
2
2
2
0
, S
I
I
3
I
7
I
5
1
• S
• S
1
• S
• S
, S
0
0
0
0
2
• S
• S
. Both true and com-
• S
• S
1
1
1
1
• S
• S
• S
• S
2
2
2
2
)
2
Truth Table
H
L
X
Z
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
OE
H
L
L
L
L
L
L
L
L
S
X
H
H
H
H
L
L
L
L
2
Inputs
S
X
H
H
H
H
L
L
L
L
1
S
H
H
H
H
X
L
L
L
L
0
I
I
I
I
I
I
I
I
Z
Z
0
1
2
3
4
5
6
7
Outputs
I
I
I
I
I
I
I
I
Z
Z
0
1
2
3
4
5
6
7