AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 61

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
MS0396-E-00
ALC1 Control 1
ALC1 Control 2
ALC1 Control 3
(Addr:02H, D2-0)
ADC Internal
MIC Input Recording
MIC Control
(Addr:00H, D0)
(Addr:00H, D1)
<Example>
ALC1 State
PMADC bit
FS3-0 bits
PMMIC bit
(Addr:05H,
(Addr:06H)
(Addr:08H)
(Addr:07H)
This sequence is an example of ALC1 setting at s=8kHz. If the parameter of the ALC1 is changed, please refer to
“Figure 31. Registers set-up sequence at the ALC1 operation“
D5,D2-0)
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bit). When the AK4632 is PLL mode, MIC and ADC should be powered-up
(2) Set up MIC input (Addr: 02H)
(3) Set up Timer Select for ALC1 (Addr: 06H)
(4) Set up REF value for ALC1 (Addr: 08H)
(5) Set up LMTH, RATT, LMAT1-0 and ALC1 bits (Addr: 07H)
(6) Power Up MIC and ADC: PMMIC bit = PMADC bit = “0” → “1”
(7) Power Down MIC and ADC: PMMIC bit = PMADC bit = “1” → “0”
State
When the registers for the ALC1 operation are not changed, ALC1 bit may be keeping “1”. The ALC1 operation
is disabled because the MIC block is powered-down. If the registers for the ALC1 operation are also changed
when the sampling frequency is changed, it should be done after the AK4632 goes to the manual mode (ALC1 bit
= “0”) or MIC block is powered-down (PMMIC bit = “0”). IPGA gain is reset when PMMIC bit is “0”, and then
IPGA operation starts from the default value when PMMIC bit is changed to “1”.
in consideration of PLL lock time after a sampling frequency is changed.
The initialization cycle time of ADC is 1059/fs=133ms@fs=8kHz.
After the ALC1 bit is set to “1” and MIC block is powered-up, the ALC1 operation starts from IPGA default
value (0dB).
XXXX
XXH
XXH
XXH
001
ALC1 Disable
(1)
Power Down
(2)
(3)
(4)
(5)
(6)
Figure 50. MIC Input Recording Sequence
Initialize Normal State Power Down
1059 / fs
ALC1 Enable
XXX
61H or 21H
X1X
00H
47H
- 61 -
ALC1 Disable
(7)
Example:
Pre MIC AMP:+20dB
ALC2 bit=“1”(default)
PLL Master Mode
Audio I/F Format:DSP Mode, BCKP=MSBS=“0”
MIC Power On
Sampling Frequency:8kHz
ALC1 setting:Refer to Figrure 29
(1) Addr:05H, Data:00H
(2) Addr:02H, Data:07H
(3) Addr:06H, Data:00H
(4) Addr:08H, Data:47H
(5) Addr:07H, Data:61H
(6) Addr:00H, Data:43H
(7) Addr:00H, Data:40H
Recording
[AK4632]
2005/06