73K222AU-IP TDK [TDK Electronics], 73K222AU-IP Datasheet

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... A unique feature of the 73K222AU is that the UART section can be used without the modem function, providing an additional asynchronous port at no added cost. The 73K222AU is designed in CMOS technology and operates from a single +5V supply. Available packaging includes 40-pin DIP or 44-pin PLCC for surface mount applications. ...

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... A select line is then provided to enable the desired interrupt operation. The UART used in the 73K222AU can be used with faster bus read and write cycles than a conventional 16C450 UART. This allows it to interface directly with higher clock rate microprocessors with no need for external circuitry to generate wait states ...

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... Four- wire operation is also available by simply using either of the transmit output signals. The relay driver output of the 73K222AU is an open drain signal capable of sinking 20 mA, which can intersymbol control a line closure relay used to take the line off hook and to perform pulse dialing ...

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Single-Chip Modem with UART PIN DESCRIPTION GENERAL NAME DIP PLCC VDD 40 44 GND 20 22 VREF 19 21 ISET 9 11 XTL1 25 27 XTL2 24 26 CLK 21 23 RESET 10 12 STNDLN 15 17 TYPE DESCRIPTION I ...

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UART INTERFACE NAME DIP PLCC UA2-UA0 37-39 41-43 UA3 12 14 UDO-UD7 27-34 30-37 DISTR 35 38 DOSTR INTRPT 5 7 RXD 6 8 TYPE DESCRIPTION I UART Address. These pins determine which of the ...

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Single-Chip Modem with UART UART INTERFACE (continued) NAME DIP PLCC TXD 7 9 ANALOG / LINE INTERFACE TXA1 3 4 TXA2 4 5 RXA 16 18 SPKR TYPE DESCRIPTION O Function is determined by STNDLN ...

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UART CONTROL INTERFACE (STNDLN = 1) (See Figure 1: Single-port mode) NAME DIP PLCC ADS 23 25 UA3 12 14 CTS 14 16 DSR 13 15 DCD 11 13 DTR 22 24 RTS TYPE DESCRIPTION ...

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... I Write. A low on this input informs the 73K222AU that control data or status information is available for writing into a modem register. The procedure for writing is to shift in data LSB first on the DATA pin for eight consecutive cycles of DCLK and then to pulse WR low ...

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Single-Chip Modem 9 with UART ...

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Single-Chip Modem with UART 10 ...

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UART CONTROL REGISTER OVERVIEW UART REGISTER ADDRESS D7 UA3-UA0* RECEIVER BUFFER 0000 BIT 7 RBR REGISTER DLAB = 0 (MSB) (READ ONLY) TRANSMIT HOLDING 0000 BIT 7 THR REGISTER DLAB = 0 (MSB) (WRITE ONLY) INTERRUPT 0001 ENABLE IER 0 ...

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Single-Chip Modem with UART MODEM CONTROL REGISTER OVERVIEW ADDRESS STNDLN 0 1 REGISTER D7 MA2- UA3- MA0 UA0 CONTROL MODULATION REGISTER CR0 000 1000 OPTION 0 CONTROL TRANSMIT REGISTER CR1 001 1001 PATTERN 1 1 DEVICE DETECT DR 010 1010 ...

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UART REGISTER BIT DESCRIPTIONS RECEIVER BUFFER REGISTER (RBR) (READ ONLY) STNDLN: ADDRESS: UA2 - UA0 = 000, DLAB = 0 This read only register contains the parallel received data with start, stop, and parity bits (if any) removed. The high ...

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Single-Chip Modem with UART INTERRUPT ID REGISTER (IIR) (READ ONLY) STNDLN: 0 ADDRESS: UA2 - UA0 = 010 The IIR register gives prioritized information as to the status of interrupt conditions. When accessed, the IIR freezes the highest priority interrupt ...

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LINE CONTROL REGISTER (LCR) STNDLN: 0 ADDRESS: UA2 - UA0 = 011 The user specifies the format of the asynchronous data communications exchange via the Line Control Register. In addition to controlling the format, the user may retrieve the contents ...

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Single-Chip Modem with UART LINE CONTROL REGISTER (LCR) BIT NO. NAME D5 Stick Parity D6 Set Break D7 Divisor Latch Access Bit (DLAB) NOTE: This feature enables the CPU to alert a terminal in a computer communications system. If the ...

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... D3 Enable Interrupt (OUT2 in 16C450) D4 LOOP Note: The µPRST bit has an upgraded function which was not included in the initial definition of the 73K222AU. 1 UA3 - UA0 = 0100 CONDITION DESCRIPTION 1 This bit controls the Data Terminal Ready ( DTR ) output. When bit 0 is set to a logic 1, the DTR output is forced to a logic 0 ...

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Single-Chip Modem with UART LINE STATUS REGISTER (LSR) STNDLN: 0 ADDRESS: UA2 - UA0 = 101 This register provides status information to the CPU concerning the data transfer. BIT NO. NAME ...

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MODEM STATUS REGISTER (MSR) (READ ONLY) STNDLN: 0 ADDRESS: UA2 - UA0 = 110 This register provides the current state of the control signals from the modem. In addition, four bits provide change information. The CTS, DSR, DCD, and RI ...

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Single-Chip Modem with UART SCRATCH REGISTER (SCR) STNDLN: 0 ADDRESS: UA2 - UA0 = 111 The Scratch Register is a dual port register which can be simultaneously accessed through both the UART bus and the modem bus. This provides the ...

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... This bit controls the power down mode of the 73K222AU, the analog, and most digital portions of the chip. The digital interface is active during power down. 0 Power down mode. 1 Normal operation. 0 DPSK 1 FSK 0 Must be written as zero ...

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Single-Chip Modem with UART CONTROL REGISTER (CR1) STNDLN: 0 ADDRESS: MA2 - MA0 = 001 BIT NO. NAME D0, D1 Test Mode D2 Reset D3 CLK Control (Clock Control) D4 Bypass Scrambler 1 UA3 - UA0 = 1001 CONDITION DESCRIPTION ...

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CONTROL REGISTER (CR1) (continued) BIT NO. NAME D5 Enable Detect Interrupt D6, D7 Transmit Pattern CONDITION DESCRIPTION 0 Disables interrupts generated by Detect Register bits INT pin in dual-port mode INTRPT pin in single-port ...

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... Continuously outputs the received data stream. data is the same as that output on the RXD pin, but it is not disabled when RXD is tri-stated Product Identified 0 0 73K212U (special order only 73K221U (special order only 73K222AU 24 MODEM SECTION The call A valid indication requires that This ...

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TONE CONTROL REGISTER (TONE) STNDLN: 0 ADDRESS: MA2 - MA0 = 011 The Tone Control Register contains information on the tones that are transmitted. Tones are transmitted only if the Transmit Enable bit is set. The priority of the transmit ...

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Single-Chip Modem with UART TONE CONTROL REGISTER (TONE) BIT NO. NAME D4 TX DTMF (Transmit DTMF ANS (Transmit Answer Tone Guard (Transmit Guard Tone) D7 RXD/TXD Control CONTROL REGISTER (CR3) STNDLN: 0 ADDRESS: MA2 - MA0 ...

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SCRATCH REGISTER (SCR) STNDLN: 0 ADDRESS: MA2 - MA0 = 110 The Scratch Register is a dual-port register which can be accessed either through the UART bus or the modem bus. It can be used for a communication path outside ...

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Single-Chip Modem with UART ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS TA = -40°C to 85°C, VDD = 5V ± 10%, unless otherwise noted. PARAMETER VDD Supply Voltage Storage Temperature Soldering Temperature (10 sec.) Applied Voltage NOTE: All inputs and outputs are ...

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DC ELECTRICAL CHARACTERISTICS TA = -40°C to +85 °C, VDD = 5V ± 10%, unless otherwise noted. PARAMETER IDD, Supply Current IDDA, Active IDDA, Active IDD1, Power-Down IDD2, Power-Down Digital Inputs Input High Current IIH Input Low Current Input Low ...

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Single-Chip Modem with UART ELECTRICAL SPECIFICATIONS DYNAMIC CHARACTERISTICS AND TIMING TA = -40°C to +85°C, VDD = 5V ± 10%, unless otherwise noted. PARAMETER DPSK Modulator Carrier Suppression Output Amplitude FSK Tone Error DTMF Generator Freq. Accuracy Output Amplitude Output ...

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DYNAMIC CHARACTERISTICS AND TIMING PARAMETER Speaker Output Gain Error Output Swing SPKR Carrier VCO Capture Range Capture Time Recovered Clock Capture Range Data Delay Time Guard Tone Generator Tone Accuracy Tone Level (Below DPSK Output) Harmonic Distortion SERIAL BUS INTERFACE ...

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Single-Chip Modem with UART ELECTRICAL SPECIFICATIONS PARALLEL BUS INTERFACE (See Figure 5) The following times are for CI = 100 pF. PARAMETER RC Read Cycle = TAD + TRC TDIW DISTR Width TDDD Delay DISTR to Data (read time) THZ** ...

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TXA1 RXA C TXA2 FIGURE 3: TXA Hybrid Loading Analog Interface Hybrid Loading READ MODE DCLK TRCK 1 1 TACR TCAR ADDRESS ADDR 1 TCAR TRD 1 TACR DATA D0 WRITE MODE DCLK ADDRESS TDCK DATA D0 D1 FIGURE 4: ...

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Single-Chip Modem with UART TADS (STNDLN = 1) TAS ADDRESS VALID UA2 (UA3)-UA0 TAR TAD DATA UD7-UD0 TRC TAW TAH TAS VALID FOR NO TRA TCS TCH LOW FOR NO TAR TDIW TAW RC TDDD THZ READ DATA FIGURE 5: ...

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... The 73K222AU was designed using an integrated analog/digital architecture that performance over a wide range of line conditions. The 73K222AU utilizes the circuit design proven in TDK Semiconductor’s 73K222L one-chip modem, with added enhancements which extend low signal level performance and increase immunity to spurious noise ...

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... In either mode of operation, the 73K222AU’s ability to operate from a single +5 volt power supply eliminates the need for additional supply voltages and keeps power usage to a minimum. (See Figure 9 & ...

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Single-Chip Modem 37 with UART ...

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Single-Chip Modem with UART 38 ...

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MECHANICAL SPECIFICATIONS 40-Pin DIP 44-Pin PLCC 0.695 (17.655) 0.685 (17.399) PIN NO. 1 IDENT. 0.695 (17.655) 0.685 (17.399) 0.656 (16.662) 0.650 (16.510) Single-Chip Modem 0.165 (4.191) 0.200 (5.080) 0.016 (0.406) 0.020 (0.508) 0.656 (16.662) 0.590 (14.986) 0.650 (16.510) 0.630 (16.002) ...

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... XTL1 XTL2 / ( ) DATA / ( ) CLK ORDER NUMBER 73K222AU-IP 73K222AU-IH 40 CAUTION: Use handling procedures necessary for a static sensitive component UD7 36 UD6 35 UD5 34 UD4 33 UD3 32 UD2 31 UD1 30 UD0 29 N/C 44-Pin PLCC 73K222AU-IH PACKAGING MARK 73K222AU-IP 73K222AU-IH 04/24/00- rev.D ...