9DB1200C IDT [Integrated Device Technology], 9DB1200C Datasheet
9DB1200C
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9DB1200C Summary of contents
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... Output cycle-cycle jitter < 50ps. • Output to output skew: 50ps • Phase jitter: PCIe Gen2 < 3.1ps rms • Phase jitter: QPI < 0.5ps rms • 64-pin TSSOP Package • Available in RoHS compliant packaging SPREAD COMPATIBLE PLL CONTROL LOGIC 1 DATASHEET 9DB1200C 12 DIF(11:0)) IREF 1414F—06/30/10 ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Pin Configuration Frequency Select Table B0b2 B0b1 B0b0 (2:0) are 3.3V tolerant low-threshold inputs. L Please see VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Pin Description PIN # PIN NAME 1 VDD 2 DIF_IN 3 DIF_IN# 4 GND 5 OE0# 6 DIF_0 7 DIF_0# 8 VDD 9 GND 10 OE1# 11 DIF_1 12 DIF_1# 13 OE2# 14 DIF_2 15 DIF_2# 16 GND 17 VDD 18 OE3# 19 DIF_3 20 DIF_3# 21 OE4# 22 DIF_4 23 DIF_4# 24 VDD 25 GND ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Pin Description PIN # PIN NAME 33 SMBDAT 34 FS1 35 BYPASS#/PLL 36 VTTPWRGD#/PD 37 DIF_6# 38 DIF_6 39 OE6# 40 GND 41 VDD 42 DIF_7# 43 DIF_7 44 OE7# 45 DIF_8# 46 DIF_8 47 OE8# 48 VDD 49 GND 50 DIF_9# 51 DIF_9 52 OE9# 53 DIF_10# 54 DIF_10 55 OE10# ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Absolute Max Symbol Parameter VDDA 3.3V Core Supply Voltage VDD 3.3V Logic Supply Voltage V Input Low Voltage IL V Input High Voltage IH Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD protection ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Electrical Characteristics - Clock Input Parameters 70°C; Supply Voltage V = 3.3 V +/- PARAMETER SYMBOL Input High Voltage - V IHDIF DIF_IN Input Low Voltage - V ILDIF DIF_IN Input Common Mode V COM Voltage - DIF_IN Input Amplitude - DIF_IN ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Electrical Characteristics - Phase Jitter PARAMETER SYMBOL Jitter, Phase tjphase Notes on Phase Jitter: 1 See http://www.pcisig.com for complete specs. Guaranteed by design and characterization, not tested in production. 2 Device driven by 932S421BGLF or equivalent 3 BER of 1E-9 4 Measured at 133MHz using CSI_133_MHZ_6_4BG_12UI template in Intel supplied Clock Jitter Tool ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Common Recommendations for Differential Routing L1 length, route as non-coupled 50ohm trace L2 length, route as non-coupled 50ohm trace L3 length, route as non-coupled 50ohm trace Rs Rt Down Device Differential Routing L4 length, route as coupled microstrip 100ohm differential trace 2 min to 16 max ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Alternative Termination for LVDS and other Common Differential Signals (figure 3) Vdiff Vp-p Vcm 0.45v 0.22v 1.08 0.58 0.28 0.6 0.80 0.40 0.6 0.60 0.3 1.2 R1a = R1b = R1 R2a = R2b = R2 Figure 3 L1 L1' HCSL Output Buffer Cable Connected AC Coupled Application (figure 4) Component R5a, R5b ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM General SMBus serial interface information for the 9DB1200C How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address DC • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM SMBus Table: Frequency Select Register Byte 0 Pin # Name Bit 7 - HIGH_BW# Bit 6 - BYPASS#/PLL Bit 5 - Reserved Bit 4 - Reserved Bit 3 - Reserved Bit 2 - FS2 Bit 1 - FS1 Bit 0 - FS0 SMBus Table: Output Control Register ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM SMBus Table: Output Enable Readback Byte 4 Pin # Name - Reserved Bit 7 Bit 6 - Reserved Bit 5 - Reserved Bit 4 - Reserved Bit 3 58,59 OE11# Bit 2 53,54 OE10# Bit 1 50,51 OE9# Bit 0 45,46 OE8# Note: For an output to be enabled, BOTH the Output Enable Bit and the OE# pin must be enabled. ...
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... Ordering Information Part / Order Number Shipping Packaging 9DB1200CGLF 9DB1200CGLFT Tape and Reel “LF” after the package code denotes the Pb-Free configuration, RoHS compliant. Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM ® IDT c SYMBOL L VARIATIONS ...
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... Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM Revision History Rev. Issue Date Description 1. Updated SMBus Serial Interface Information. A 12/18/2007 2. Release to Final. B 4/7/2008 Added Input Clock Parameters 1. Updated Phase Jitter Numbers 2. Added PLL BW and jitter peaking specs 3. Added input to output delay specs ...