OCX160-PBI ETC [List of Unclassifed Manufacturers], OCX160-PBI Datasheet - Page 21

• Manufacturer Part Number: OCX160-PBI
• Description: OCX160 Crosspoint Switch
• Manufacturer: ETC [List of Unclassifed Manufacturers]

2. Pin Description
I-Cube, Inc.
NOTES:
INP[79:0]
INN[79:0]
OUTP[79:0]
OUTN[79:0]
CLKP
CLKN
OE#
HW_RST#
UPDATE#
RCA[6:0]
RCB[6:0]
RCO[4:0]
RCI[3:0]
RC_CLK#
RC_EN#
TCK
TMS
TDI
TRST#
TDO
V
V
V
V
DD
DD
DD
SS
Pin Name
.CORE
.PAD
.IN
1. Dedicated differential input buffers can receive both LVDS and LVPECL voltage levels using
2. V
3. Dedicated differential output buffers can be biased using different supplies for V
4. The LVTTL control, JTAG pins, and differential input ports are 3.3V—they are not 5V tolerant.
5. The differential output pins powered from 2.5V are 3.3V tolerant.
(1, 4)
(2, 3)
3.3V supply.
external resistors to support both LVDS and LVPECL output voltage levels.
DD
.PAD is 2.5V for LVDS outputs or 3.3V for LVPECL outputs.
# of Pins
80
80
80
80
12
36
1
1
1
1
1
7
7
5
4
1
1
1
1
1
1
1
8
8
Table 12
2.5V or 3.3V Power Differential Output Buffer Voltage
OCX160 Crosspoint Switch—Preliminary Data Sheet
2.5V Power
3.3V Power
Ground
Output
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
[Rev. 1.6] 2/20/01
Power and Ground Pins
OCX160 Pin Description
JTAG Pins
RC Pins
Non-inverting differential input signals
Inverting differential input signals
Non-inverting differential input signals
Inverting differential input signals
Non-inverting differential Global Clock
Inverting differential Global Clock
Global Output Enable
Hardware Reset
Global Update
RapidConfigure Address A
RapidConfigure Address B
RapidConfigure Readback
RapidConfigure Instruction Bits
RapidConfigure Clock
RapidConfigure Cycle Enable
JTAG Test Clock
JTAG Test Mode Select
JTAG Test Data In
JTAG Test Reset
JTAG Test Data Out
Core Voltage
LVTTL Control pins Voltage and Differential Input
Buffer Voltage
Ground
Description
DD
.PAD and
21