EM25LV010-25KGBS EMC [ELAN Microelectronics Corp], EM25LV010-25KGBS Datasheet - Page 18

• Manufacturer Part Number: EM25LV010-25KGBS
• Description: 1 Megabit (128K x 8) Serial Flash Memory
• Manufacturer: EMC [ELAN Microelectronics Corp]

Power-Up and Power-Down
This specification is subject to change without further notice. (11.08.2004 V1.0)
Read Manufacturer and Device ID (RDID)
The Read Manufacturer/Device ID (RDID) instruction provides both the JEDEC assigned
manufacturer ID and the specific device ID. The Read Manufacture/Device ID (RDID)
instruction is very similar to the Release from Deep Power-Down (RES) and Read Device ID
instruction. The instruction is initiated by driving the Chip Select (S#) Low and shifting the
instruction code “90h” followed by a 24-bit address (A23-A0) of 000000h. After which, the
Manufacturer ID for ELAN (7Fh, 7Fh, 1Fh) and the Device ID (10h) are shifted out on the
falling edge of the serial clock (C) with the most significant bit (MSB) shifted out first as shown
in Figure 22. If the 24-bit address is initially set to 000001h, the Device ID will be read first
and then followed by the Manufacturer ID. The Manufacturer and Device ID can be read
continuously, alternating from one to the other. The instruction is completed by driving Chip
Select (S#) High.
At Power-up and Power-down, the device must not be selected (that is, the Chip Select, S#,
must follow the voltage applied on V
Usually a simple pull-up resistor on Chip Select (S#) is used to insure safe and proper
Power-up and Power-down.
To prevent data corruption and inadvertent write during power up, a Power On Reset (POR)
circuit is included in the device. The logic inside the device is held at reset when V
than the POR threshold value. All operations of V
respond to any instruction.
Moreover, the device ignores all Write Enable (WREN), Page Program (PP), Block Erase (BE),
Chip Erase(CE), and Write Status Register (WRSR) instructions until a time delay of t
elapsed after the instant where V
not operate correctly if V
Program, or Erase instruction should be sent until–
These values are specified in Table 8.
If the delay (t
for READ instructions even if the t
Vcc(min) at Power-up, and then for a further delay of tVSL
Vss at Power-down
tPUW after Vcc passed the V
tVSL after Vcc passed the Vcc(min) level
VSL
) has elapsed after V
CC
remains below V
1 Megabit (128K x 8) Serial Flash Memory
CC
WI
PUW
rises above the V
threshold
CC
CC
delay has not yet fully elapsed.
) until V
has risen above V
CC
CC
(min) at such time. No Write Status Register,
reaches the correct value:
WI
WI
are disabled, and the device does not
threshold. However, the device may
CC
SPECIFICATION
(min), the device can be selected
EM25LV010
Page 18 of 30
CC
PUW
is less
has