74VHC139MTC Fairchild Semiconductor, 74VHC139MTC Datasheet - Page 2

• Manufacturer Part Number: 74VHC139MTC
• Description: IC DECODER/MUX DUAL 2-4 16-TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74VHCr
• Type: Decoder/Demultiplexerr

Specifications of 74VHC139MTC

• Circuit: 1 x 2:4
• Independent Circuits: 2
• Current - Output High, Low: 8mA, 8mA
• Voltage Supply Source: Single Supply
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Logic Type: Decoder / Demultiplexer
• No. Of Outputs: 4
• Supply Voltage Range: 2V To 5.5V
• Logic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Family Type: 74VHC
• Logical Function: Decoder/Demux
• Logic Family: VHC
• Number Of Elements: 2
• Polarity: Inverting
• Number Of Inputs: 2
• Number Of Outputs: 4
• Output Type: Standard
• Propagation Delay Time: 16.5ns
• Package Type: TSSOP
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Quiescent Current: 4uA
• Technology: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Logic Symbols
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
IEEE/IEC
2
Functional Description
The VHC139 is a high-speed dual 2-to-4 decoder/demulti-
plexer. The device has two independent decoders, each of
which accepts two binary weighted inputs (A
vides four mutually exclusive active-LOW outputs (O
Each decoder has an active-LOW enable (E). When E is
HIGH all outputs are forced HIGH. The enable can be used
as the data input for a 4-output demultiplexer application.
Each half of the VHC139 generates all four minterms of
two variables. These four minterms are useful in some
applications, replacing multiple gate functions as shown in
Figure 1 , and thereby reducing the number of packages
required in a logic network.
FIGURE 1. Gate Functions (Each Half)
0
–A
1
) and pro-
0
–O
3
).