C8051F960-A-DK Silicon Laboratories Inc, C8051F960-A-DK Datasheet - Page 17

no-image

C8051F960-A-DK

Manufacturer Part Number
C8051F960-A-DK
Description
C8051F960 Development Kit
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F960-A-DK

Lead_time
56
Pack_quantity
1
Comm_code
85437090
C8051F96x
List of Registers
SFR Definition 5.1. ADC0CN: ADC0 Control ................................................................ 86
SFR Definition 5.2. ADC0CF: ADC0 Configuration ...................................................... 87
SFR Definition 5.3. ADC0AC: ADC0 Accumulator Configuration ................................. 88
SFR Definition 5.4. ADC0PWR: ADC0 Burst Mode Power-Up Time ............................ 89
SFR Definition 5.5. ADC0TK: ADC0 Burst Mode Track Time ....................................... 90
SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte ............................................ 91
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte .............................................. 91
SFR Definition 5.8. ADC0GTH: ADC0 Greater-Than High Byte ................................... 92
SFR Definition 5.9. ADC0GTL: ADC0 Greater-Than Low Byte .................................... 92
SFR Definition 5.10. ADC0LTH: ADC0 Less-Than High Byte ...................................... 93
SFR Definition 5.11. ADC0LTL: ADC0 Less-Than Low Byte ........................................ 93
SFR Definition 5.12. ADC0MX: ADC0 Input Channel Select ........................................ 96
SFR Definition 5.13. TOFFH: Temperature Sensor Offset High Byte ........................... 99
SFR Definition 5.14. TOFFL: Temperature Sensor Offset Low Byte ............................ 99
SFR Definition 5.15. REF0CN: Voltage Reference Control ........................................ 102
SFR Definition 6.1. IREF0CN: Current Reference Control ......................................... 103
SFR Definition 6.2. IREF0CF: Current Reference Configuration ................................ 104
SFR Definition 7.1. CPT0CN: Comparator 0 Control .................................................. 108
SFR Definition 7.2. CPT0MD: Comparator 0 Mode Selection .................................... 109
SFR Definition 7.3. CPT1CN: Comparator 1 Control .................................................. 110
SFR Definition 7.4. CPT1MD: Comparator 1 Mode Selection .................................... 111
SFR Definition 7.5. CPT0MX: Comparator0 Input Channel Select ............................. 113
SFR Definition 7.6. CPT1MX: Comparator1 Input Channel Select ............................. 114
SFR Definition 8.1. DPL: Data Pointer Low Byte ........................................................ 121
SFR Definition 8.2. DPH: Data Pointer High Byte ....................................................... 121
SFR Definition 8.3. SP: Stack Pointer ......................................................................... 122
SFR Definition 8.4. ACC: Accumulator ....................................................................... 122
SFR Definition 8.5. B: B Register ................................................................................ 122
SFR Definition 8.6. PSW: Program Status Word ........................................................ 123
SFR Definition 9.1. PSBANK: Program Space Bank Select ....................................... 127
SFR Definition 10.1. EMI0CN: External Memory Interface Control ............................ 132
SFR Definition 10.2. EMI0CF: External Memory Configuration .................................. 133
SFR Definition 10.3. EMI0TC: External Memory Timing Control ................................ 138
SFR Definition 11.1. DMA0EN: DMA0 Channel Enable ............................................. 150
SFR Definition 11.2. DMA0INT: DMA0 Full-Length Interrupt ...................................... 151
SFR Definition 11.3. DMA0MINT: DMA0 Mid-Point Interrupt ..................................... 152
SFR Definition 11.4. DMA0BUSY: DMA0 Busy .......................................................... 153
SFR Definition 11.5. DMA0SEL: DMA0 Channel Select for Configuration ................. 154
SFR Definition 11.6. DMA0NMD: DMA Channel Mode .............................................. 155
SFR Definition 11.7. DMA0NCF: DMA Channel Configuration ................................... 156
SFR Definition 11.8. DMA0NBAH: Memory Base Address High Byte ........................ 157
SFR Definition 11.9. DMA0NBAL: Memory Base Address Low Byte ......................... 157
SFR Definition 11.10. DMA0NAOH: Memory Address Offset High Byte .................... 158
Rev. 0.5
17

Related parts for C8051F960-A-DK