74VHC00 Fairchild Semiconductor, 74VHC00 Datasheet
74VHC00
Manufacturer Part Number
74VHC00
Description
Manufacturer
Fairchild Semiconductor
Specifications of 74VHC00
Case
SOP-14
Date_code
98-99+/SZ
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DESCRIPTION
The 74VHC00 is an advanced high-speed CMOS
QUAD 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
The internal circuit is composed of 3 stages
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 1999
HIGH SPEED: t
LOW POWER DISSIPATION:
I
HIGH NOISE IMMUNITY:
V
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
CC
PLH
OH
NIH
CC
= 2 A (MAX.) at T
| = I
(OPR) = 2V to 5.5V
= V
2
t
MOS technology.
PHL
OL
NIL
= 8 mA (MIN)
= 28% V
OLP
PD
= 3.7 ns (TYP.) at V
= 0.8V (Max.)
CC
A
(MIN.)
= 25
o
C
CC
= 5V
QUAD 2-INPUT NAND GATE
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2kV ESD immunity and transient excess
voltage.
(Micro Package)
74VHC00M
M
ORDER CODES :
(TSSOP Package)
74VHC00
PRELIMINARY DATA
74VHC00T
T
1/7
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