SST28LF040 Silicon Storage Technology, Inc, SST28LF040 Datasheet

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SST28LF040

Manufacturer Part Number
SST28LF040
Description
Manufacturer
Silicon Storage Technology, Inc
Datasheet

Specifications of SST28LF040

Case
TSOP
Date_code
06+

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FEATURES:
• Single Voltage Read and Write Operations
• Superior Reliability
• Memory Organization: 512K x 8
• Sector Erase Capability: 256 bytes per Sector
• Low Power Consumption
• Fast Sector Erase/Byte Program Operation
PRODUCT DESCRIPTION
The 28SF040/28LF040/28VF040 are 512K x 8 bit
CMOS sector erase, byte program EEPROMs. The
28SF040/28LF040/28VF040 are manufactured using
SST’s proprietary, high performance CMOS SuperFlash
EEPROM Technology. The split gate cell design and
thick oxide tunneling injector attain better reliability and
manufacturability compared with alternative ap-
proaches. The 28SF040/28LF040/28VF040 erase and
program with a single power supply. The 28SF040/
28LF040/28VF040 conform to JEDEC standard pinouts
for byte wide memories and are compatible with existing
industry standard EPROM, flash EPROM and EEPROM
pinouts.
Featuring high performance programming, the
28SF040/28LF040/28VF040 typically byte program in
35 µs. The 28SF040/28LF040/28VF040 typically sector
erase in 2 ms. Both program and erase times can be
optimized using interface features such as Toggle bit or
Data# Polling to indicate the completion of the write
cycle. To protect against an inadvertent write, the
28SF040/28LF040/28VF040 have on chip hardware
and software data protection schemes. Designed,
manufactured, and tested for a wide spectrum of applica-
tions, the 28SF040/28LF040/28VF040 are offered with a
guaranteed sector endurance of 10
retention is rated greater than 100 years.
© 1998 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. These specifications are subject to change without notice.
310-04 12/97
– 5.0V-only for the 28SF040
– 3.0V-only for the 28LF040
– 2.7V-only for the 28VF040
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 15 mA (typical) for 5.0V and
– Standby Current: 5 µA (typical)
– Byte Program Time: 35 µs (typical)
– Sector Erase Time: 2 ms (typical)
– Complete Memory Rewrite: 20 sec (typical)
10 mA (typical) for 3.0/2.7V
4 Megabit (512K x 8) SuperFlash EEPROM
SST28SF040, SST28LF040, SST28VF040
4
or 10
3
cycles. Data
3
• Fast Read Access Time
• Latched Address and Data
• Hardware and Software Data Protection
• End of Write Detection
• TTL I/O Compatibility
• Packages Available
The 28SF040/28LF040/28VF040 are best suited for
applications that require reprogrammable nonvolatile
mass storage of program, configuration, or data
memory. For all system applications, the 28SF040/
28LF040/28VF040 significantly improve performance
and reliability, while lowering power consumption when
compared with floppy diskettes or EPROM approaches.
EEPROM technology makes possible convenient and
economical updating of codes and control programs on-
line. The 28SF040/28LF040/28VF040 improve flexibil-
ity, while lowering the cost of program and configuration
storage application.
The functional block diagram shows the functional
blocks of the 28SF040/28LF040/28VF040. Figures 1
and 2 show the pin assignments for the 32 pin TSOP, 32
pin PDIP, and 32 pin PLCC packages. Pin description
and operation modes are described in Tables 1
through 4.
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the
device using standard microprocessor write sequences.
A command is written by asserting WE# low while
keeping CE# low. The address bus is latched on the
falling edge of WE# or CE#, whichever occurs last. The
data bus is latched on the rising edge of WE# or CE#,
whichever occurs first. Note, during the software data
protection sequence the address are latched on the
rising edge of OE# or CE#, whichever occurs first.
– 5.0V-only operation: 120 and 150 ns
– 3.0V-only operation: 200 and 250 ns
– 2.7V-only operation: 250 and 300 ns
– 7-Read-Cycle-Sequence Software Data
– Toggle Bit
– Data# Polling
– 32-Pin TSOP (8 mm x 20 mm)
– 32-Pin PLCC
– 32-Pin PDIP
Protection
Data Sheet
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

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