CA91L862A50CE Tundra Semiconductor, CA91L862A50CE Datasheet - Page 16
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CA91L862A50CE
Manufacturer Part Number
CA91L862A50CE
Description
BGA
Manufacturer
Tundra Semiconductor
Datasheet
1.CA91L862A-50CL.pdf
(428 pages)
Specifications of CA91L862A50CE
Date_code
05+
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List of Figures
Figure 28: Single Write — QSpan II as MC68360 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Figure 29: Delayed Single Read — QSpan II as MC68360 Slave . . . . . . . . . . . . . . . . . . . . . . . . . 324
Figure 30: Single Write — QSpan II as MC68360 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
Figure 31: Register Read — QSpan II as MC68360 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Figure 32: Register Write — QSpan II as MC68360 Slave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Figure 33: MC68360 DREQ_ Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328
Figure 34: MC68360 IDMA Read — Single Address, Standard Terminations . . . . . . . . . . . . . . . 329
Figure 35: MC68360 IDMA Write — Single Address, Standard Terminations . . . . . . . . . . . . . . . 330
Figure 36: MC68360 IDMA Read — Single Address, Fast Termination . . . . . . . . . . . . . . . . . . . . 331
Figure 37: MC68360 IDMA Write — Single Address, Fast Termination . . . . . . . . . . . . . . . . . . . 331
Figure 38: MC68360 IDMA Read — Dual Address, Standard Termination . . . . . . . . . . . . . . . . . 332
Figure 39: MC68360 IDMA Write — Dual Address, Standard Termination . . . . . . . . . . . . . . . . . 333
Figure 40: MC68360 IDMA Read — Dual Address, Fast Termination . . . . . . . . . . . . . . . . . . . . . 334
Figure 41: MC68360 IDMA Read — Dual Address, Fast Termination . . . . . . . . . . . . . . . . . . . . . 335
Figure 42: QBus Arbitration — MPC860 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
Figure 43: Single Read — QSpan II as MPC860 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Figure 44: Single Write — QSpan II as MPC860 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Figure 45: Burst Read — QSpan II as MPC860 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Figure 46: Aligned Burst Write — QSpan II as MPC860 Master . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Figure 47: Single Read — QSpan II as MPC860 Slave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341
Figure 48: Single Write — QSpan II as MPC860 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
Figure 49: Burst Read — QSpan II as MPC860 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
Figure 50: Burst Write — QSpan II as MPC860 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Figure 51: Register Read — QSpan II as MPC860 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
Figure 52: Register Write — QSpan II as MPC860 Slave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Figure 53: MPC860 DREQ_ Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
Figure 54: MPC860 IDMA Read — Single Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Figure 55: MPC860 IDMA Write — Single Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Figure 56: MPC860 IDMA Read — Dual Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 57: MPC860 IDMA Write — Dual Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 58: QCLK Input Timing — M68040 BCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 59: QBus Arbitration — M68040. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Figure 60: Single Read — QSpan II as M68040 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Figure 61: Single Write — QSpan II as M68040 Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354
Figure 62: Single Read — QSpan II as M68040 Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355
16
QSpan II PCI-to-Motorola Processor Bridge Manual
8091862.MA001.06
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