AT52BR6408A ATMEL [ATMEL Corporation], AT52BR6408A Datasheet
AT52BR6408A
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AT52BR6408A Summary of contents
Page 1
... Low-power – Typical (Active) – 1 µA Typical (Standby) • Industrial Temperature Range Stack Module Description The AT52BR6408A(T) consists of a 64-Mbit Flash stacked with an 8-Mbit SRAM in a single CBGA package. Stack Module Memory Contents Device Memory Combination AT52BR6408A(T) 64M Flash + 8M SRAM ...
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... CBGA 66C4 – Top View Pin Configurations AT52BR6408A( A20 A11 A15 B A16 A8 A10 C WE A21 D SGND RESET E WP VPP A19 SOE G A18 A17 Pin Name Function A0 - A21 Address I/O0 - I/O15 Data Inputs/Outputs CE1 Flash Chip Enable ...
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... RESET pin halts the present device operation and puts the outputs of the device in a high-impedance state. When a high level is reasserted on the RESET pin, the device returns to read or standby mode, depending upon the state of the control pins. AT52BR6408A(T) input. Erase, Erase Suspend/Resume, Program Sus- is ...
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... AT52BR6408A(T) 4 ERASE: Before a word can be reprogrammed it must be erased. The erased state of the memory bits is a logical “1”. The entire memory can be erased by using the Chip Erase command or individual planes or sectors can be erased by using the Plane Erase or Sector Erase commands. CHIP ERASE: Chip Erase is a six-bus cycle operation. The automatic erase begins on the rising edge of the last WE pulse ...
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... Table 2. Sector Protection Status I/O1 I/O0 Sector Protection Status 0 0 Sector Not Locked 0 1 Softlock Enabled 1 0 Hardlock Enabled 1 1 Both Hardlock and Softlock Enabled AT52BR6408A(T) Erase/ Soft- Prog lock Allowed? Comments 0 Yes No sector is locked 1 No Sector is Softlocked. The Unlock command can unlock the sector. 1 ...
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... AT52BR6408A(T) 6 PROGRAM/ERASE STATUS: The device provides several bits to determine the status of a program or erase operation: I/O2, I/O3, I/O5, I/O6, and I/O7. All other status bits are don’t care. Table 3 on page 11 and the following four sections describe the function of these bits. To provide greater flexibility for system designers, the 64-Mbit device con- tains a programmable configuration register ...
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... Please see the Protection Register Addressing Table on page 13 for the address locations in the protection register. To read the protection register, the Product ID Entry command is given followed by a normal read operation from an address within AT52BR6408A(T) status bit has been set to a “1”, PP ...
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... AT52BR6408A(T) 8 the protection register. After determining whether block B is protected or not or reading the protection register, the Product ID Exit command must be given prior to performing any other operation. CFI: Common Flash Interface (CFI published, standardized data structure that may be read from a Flash device. CFI allows system software to query the installed device to determine the configurations, various electrical and timing parameters, and functions supported by the device ...
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... I/O7 should be rechecked even if I/O5 = “1” because I/O7 may change simultaneously with I/O5. 3425A–STKD–1/04 Figure 2. Data Polling Algorithm (Configuration Register = 01) YES Note: Program/Erase Operation Successful, Device in Read Mode AT52BR6408A(T) START Read I/O7 - I/O0 Addr = YES NO I/O3, I/ YES Program/Erase Program/Erase Operation Not Operation ...
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... Program/Erase Operation Not Successful, Write Product ID Exit Command Note: 1. The system should recheck the toggle bit even if I/O5 = “1” because the toggle bit may stop toggling as I/O5 changes to “1”. AT52BR6408A(T) 10 Figure 4. Toggle Bit Algorithm (Configuration Register = 01) NO Program/Erase Operation Successful, Device in ...
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... DATA DATA DATA 0/0 DATA DATA DATA DATA DATA DATA TOGGLE DATA DATA DATA TOGGLE DATA DATA DATA I/O7/0 DATA DATA AT52BR6408A(T) 00/01 00/01 00/01 00/01 Plane C Plane D Plane A Plane B DATA DATA 1 DATA DATA DATA DATA 1 TOGGLE DATA DATA DATA DATA TOGGLE DATA DATA DATA ...
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... Status Read from Plane C xxx = 3XX555 Status Read from Plane data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed. 9. The default state (after power-up) of the configuration register is “00”. AT52BR6408A(T) 12 (1) 1st Bus ...
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... AT52BR6408A(T) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied ...
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... SA38 32K B SA39 32K B SA40 32K B SA41 32K B SA42 32K B SA43 32K B SA44 32K AT52BR6408A(T) 14 Memory Organization – 64-Mbit Bottom Boot (Continued) x16 Address Range Plane (A21 - A0) B 00000 - 00FFF B 01000 - 01FFF B 02000 - 02FFF B 03000 - 03FFF B 04000 - 04FFF B 05000 - 05FFF B 06000 - 06FFF ...
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... D 310000 - 317FFF D D 318000 - 31FFFF 320000 - 327FFF D 328000 - 32FFFF D D 330000 - 337FFF 338000 - 33FFFF D 340000 - 347FFF D 348000 - 34FFFF AT52BR6408A(T) x16 Size Address Range Sector (Words) (A21 - A0) SA113 32K 350000 - 357FFF SA114 32K 358000 - 35FFFF SA115 32K 360000 - 367FFF SA116 ...
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... SA38 32K C SA39 32K C SA40 32K C SA41 32K C SA42 32K C SA43 32K C SA44 32K AT52BR6408A(T) 16 Memory Organization – 64-Mbit Top Boot (Continued) x16 Address Range Plane (A21 - A0) C 00000 - 07FFF C 08000 - 0FFFF C 10000 - 17FFF C 18000 - 1FFFF C 20000 - 27FFF C 28000 - 2FFFF C 30000 - 37FFF ...
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... A 340000 - 347FFF A 348000 - 34FFFF A 350000 - 357FFF A 358000 - 35FFFF A 360000 - 367FFF A 368000 - 36FFFF A 370000 - 377FFF A 378000 - 37FFFF 380000 - 387FFF AT52BR6408A(T) x16 Size Address Range Sector (Words) (A21 - A0) SA113 32K 388000 - 38FFFF SA114 32K 390000 - 397FFF SA115 32K 398000 - 39FFFF SA116 32K ...
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... Manufacturer Code: 001FH; Device Code: 00D6H – Bottom Boot; 00D2H – Top Boot. 4. See details under “Software Product Identification Entry/Exit” on page 24. 5. The VPP pin can be tied (min) = 1.65V. IHPP 7. V (max) = 0.8V. ILPP AT52BR6408A(T) 18 Industrial (5) WE RESET ...
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... OUT -100 µ -400 µA OH 2.0V AC DRIVING 1.5V LEVELS 0. < 1.8K OUTPUT PIN 1. Max Units 6 12 AT52BR6408A(T) Min Max 0.6 2.0 0.45 2.5 2.4 AC MEASUREMENT LEVEL Conditions OUT Units µA µA µ ...
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... DF t RESET to Output Delay RO Asynchronous Read Cycle Waveform Notes may be delayed may be delayed without impact ACC specified from OE or CE, whichever occurs first ( pF). DF AT52BR6408A(T) 20 64-Mbit-70 Min Max 150 (1)(2)(3) tRC A0 - A21 ADDRESS VALID ...
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... High Pulse Width WPH AC Word Load Waveforms WE Controlled CE I/O0-I/O15 A0 -A21 WE CE Controlled WE I/O0-I/O15 A0 -A21 CE 3425A–STKD–1/04 DATA VALID DATA VALID AT52BR6408A(T) Min Max Units ...
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... Command Definitions on page 12.) 3. For chip erase, the data should be XX10H, for plane erase, the data should be XX20H, and for sector erase, the data should be XX30H 4. The waveforms shown above use the WE controlled AC Word Load Waveforms. AT52BR6408A( ...
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... OEHP 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 3425A–STKD–1/04 Min 10 10 (2) 0 (1) Min AT52BR6408A(T) Typ Max Typ Max Units Units ...
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... If a read status has been entered for a plane, any read from this plane will be a status read while any read of another plane will be a memory read, either random or burst. Program or erase operations cannot be performed while one of the planes is in the read status mode. AT52BR6408A(T) 24 Software Product Identification Exit ...
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... Max chip erase/ typ chip erase Device size x16 device x16 device Multiple byte write not supported Multiple byte write not supported 2 regions 64K bytes 126 64K bytes 126 64K bytes 256 64K bytes 256 8K bytes bytes bytes bytes AT52BR6408A(T) 25 ...
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... AT52BR6408A(T) 26 Comments VENDOR SPECIFIC EXTENDED QUERY “P” “R” “I” Major version number, ASCII Minor version number, ASCII Bit 0 – chip erase supported, 0 – no, 1 – yes Bit 1 – erase suspend supported, 0 – no, 1 – yes Bit 2 – ...
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... TTL Compatible Inputs and Outputs • Battery Backup – 1.2V (Min) Data Retention Voltage (V) Speed (ns) 2 A18 SCS1 SCS2 SOE SLB SUB SWE AT52BR6408A(T) Operation Standby Current/I (mA) Current (µA) CC (Max) (Max ROW DECODER MEMORY ARRAY 512K X 16 Temperature (° ...
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... Symbol Parameter V Supply Voltage CC V Ground SS V Input High Voltage IH (1) V Input Low Voltage IL Note: 1. Undershoot -1.5V for pulse width less than 30 ns. Undershoot is sampled, not 100% tested. IL AT52BR6408A(T) 28 (1) Rating -0.3 to 3.6 -0.3 to 3.6 - -55 to 150 (2) (2) SLB SUB Mode X X Deselected ...
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... IH IL SCS1 > 0. SCS2 < 0. SUB, SLB > 0. > 0. & Condition I/O AT52BR6408A(T) Min Max Unit -1 1 µ µ 0 µA 0.4 V 2.4 V Max Unit ...
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... AC Test Conditions TA = -40° 85° C, Unless Otherwise Specified Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load CLZ OLZ BLZ Others AT52BR6408A( CHZ OHZ BHZ WHZ Min ...
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... AC Test Loads 3425A–STKD–1/04 D OUT Note: Including jig and scope capacitance. AT52BR6408A( 2.8V TM 1029 Ohm (1) CL 1728 Ohm 31 ...
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... Transition is measured ± 200 mV from steady state voltage. This parameter is sampled and not 100% tested. 4. SCS1 in high for the standby, low for active. SCS2 in low for the standby, high for active. SUB and SLB in high for the standby, low for active. AT52BR6408A( ...
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... SCS1 in high for the standby, low for active SCS2 in low for the standby, high for active. SUB and SLB in high for the standby, low for active. 3425A–STKD–1/04 (1),(4),( HIGH-Z DATA VALID (3)(7) t WHZ (1),(4),( HIGH-Z HIGH-Z AT52BR6408A(T) ( (5) (5) ( DATA VALID 33 ...
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... Typical values are under the condition read cycle time. RC Data Retention Timing Diagram 1 VCC 2.7V IH VDR SCS1 VSS Data Retention Timing Diagram 2 VCC 2.7V SCS2 VDR 0.4V VSS AT52BR6408A(T) 34 Test Condition SCS1 > 0. SCS2 < 0. SUB, SLB > 0. > 0. < ...
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... Flash Boot Block SRAM Bottom 512K x 16 Top 512K x 16 Bottom 512K x 16 Top 512K x 16 Package Type AT52BR6408A(T) Package Operation Range 66C4 Industrial (-40° to 85° C) 66C4 Industrial (-40° to 85° C) 66C4 Industrial (-40° to 85° C) 66C4 Industrial (-40° ...
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... Bottom View 2325 Orchard Parkway San Jose, CA 95131 R AT52BR6408A( Ball Corner 1.20 REF Øb TITLE 66C4, 66-ball ( Array 1.2 mm Body, 0.8 mm Ball Pitch Chip-scale Ball Grid Array Package (CBGA) ...
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Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...