K4H56038D-TC SAMSUNG [Samsung semiconductor], K4H56038D-TC Datasheet - Page 18
K4H56038D-TC
Manufacturer Part Number
K4H56038D-TC
Description
256Mb D-die DDR400 SDRAM Specification
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K4H56038D-TC.pdf
(18 pages)
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j. Table 3 is used to increase tDS and tDH in the case where the I/O slew rate is below 0.5 V/ns. The I/O slew rate is based on the lesser
k. DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve setup and hold times. Signal transi
DDR SDRAM 256Mb D-die (x8, x16)
on the lesser of the AC ~ AC slew rate and the DC- DC slew rate. The inut slew rate is based on the lesser of the slew rates deter
mined by either VIH(ac) to VIL(ac) or VIH(DC) to VIL(DC), and similarly for rising transitions.
tions through the DC region must be monotonic.
Rev. 1.1 Feb. 2003
DDR SDRAM
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