HB28B064MM2 RENESAS [Renesas Technology Corp], HB28B064MM2 Datasheet - Page 5
HB28B064MM2
Manufacturer Part Number
HB28B064MM2
Description
MultiMediaCard 16 MByte/32 MByte/64 MByte/128 MByte
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HB28B064MM2.pdf
(90 pages)
- Current page: 5 of 90
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Block Diagram
All units in these Hitachi MultiMediaCards are clocked by an internal clock generator. The Interface
driver unit synchronizes the DAT and CMD signals from external CLK to the internal used clock signal.
The card is controlled by the three line MultiMediaCard interface containing the signals: CMD, CLK,
DAT (refer to Chapter “Interfaces”). For the identification of the MultiMediaCard in a stack of
MultiMediaCards, a card identification register (CID) and a relative card address register (RCA) is
foreseen. An additional register contains different types of operation parameters. This register is called
card specific data register (CSD). The communication using the MultiMediaCard lines to access either the
memory field or the registers is defined by the MultiMediaCard standard (refer to Chapter
“Communication”). The card has its own power on detection unit. No additional master reset signal is
required to setup the card after power on. It is protected against short circuit during insertion and removal
while the MultiMediaCard system is powered up (refer to Chapter “Power Supply”). No external
programming voltage supply is required. The programming voltage is generated on card.
These Hitachi MultiMediaCards support a second interface operation mode the SPI interface mode. The
SPI mode is activated if the CS signal is asserted (negative) during the reception of the reset command
(CMD0) (refer to Chapter “SPI Communication”).
Generator
V
PP
Flash control
CS CMD/DI
Internal clock
1
CSD[127:0]
RCA[15:0]
OCR[31:0]
CID[127:0]
2
Memory core
3
V
Core control
Interface driver
CC
HB28H016/D032/B064/B128MM2
4
CLK/SCLK
Interface
5
6
DAT/DO
7
Rev.5.0, Jan. 2003, page 3 of 88
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