LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 12

• Manufacturer Part Number: LRI64-A1S
• Description: Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

LRI64
SPECIAL FIELDS
Unique Identifier (UID)
Members of the LRI64 family are uniquely identi-
fied by a 64-bit Unique Identifier (UID). This is
used for addressing each LRI64 device uniquely
and individually, during the anti-collision loop and
for one-to-one exchange between a VCD and an
LRI64.
The UID complies with ISO/IEC 15963 and ISO/
IEC 7816-6. It is a read-only code, and comprises
(as summarized in
–
–
–
Figure 14. UID Format
Figure 15. Decision Tree for AFI
12/38
63
Most significant bits
E0h
8-bit prefix, the most significant bits, set at E0h
8-bit IC Manufacturer code (ISO/IEC 7816-6/
AM1), set at 02h (for STMicroelectronics)
48-bit Unique Serial Number
No
55
Answer given by the VICC
to the Inventory Request
02h
Inventory Request
47
AFI value
Received
AFI Flag
Set ?
= 0 ?
Yes
Yes
Figure
Unique Serial Number
No
AFI value
14.):
= Internal
value ?
Yes
Least significant bits
No Answer
No
AI06679B
AI09725
0
Application Family Identifier (AFI)
The Application Family Identifier (AFI) indicates
the type of application targeted by the VCD, and is
used to select only those LRI64 devices meeting
the required application criteria (as summarized in
Figure
LRI64 issuer in the AFI register. Once pro-
grammed, it cannot be modified.
The most significant nibble of the AFI is used to in-
dicate one specific application, or all families. The
least significant nibble of the AFI is used to code
one specific sub-families, or all sub-families. Sub-
family codes, other than 0, are proprietary (as de-
scribed in ISO 15693 and ISO 18000-3 Mode 1
documentation).
Data Storage Format Identifier (DSFID)
The Data Storage Format Identifier (DSFID) indi-
cates how the data is structured in the LRI64
memory. It is coded on one byte. It allows for quick
and brief knowledge on the logical organization of
the data. It is programmed by the LRI64 issuer in
the DSFID register. Once programmed, it cannot
be modified.
Cyclic Redundancy Code (CRC)
The Cyclic Redundancy Code (CRC) is calculated
as defined in ISO/IEC 13239, starting from an ini-
tial register content of all ones: FFFFh.
The 2-byte CRC is appended to each Request and
each Response, within each frame, before the
EOF. The CRC is calculated on all the bytes after
the SOF, up to the CRC field.
Upon reception of a Request from the VCD, the
LRI64 verifies that the CRC value is valid. If it is in-
valid, it discards the frame, and does not answer
the VCD.
Upon reception of a Response from the LRI64, it is
recommended that the VCD verify that the CRC
value is valid. If it is invalid, the actions that need
to be performed are up to the VCD designer.
The CRC is transmitted Least Significant Byte first.
Each byte is transmitted Least Significant Bit first,
as shown in
Figure 16. CRC Format
15.). The value is programmed by the
Least Significant Byte
l.s.bit
Figure
16.).
m.s.bit
Most Significant Byte
l.s.bit
m.s.bit
AI09726