LRI64-A1T STMICROELECTRONICS [STMicroelectronics], LRI64-A1T Datasheet - Page 28
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LRI64-A1T
Manufacturer Part Number
LRI64-A1T
Description
Memory TAG IC at 13.56 MHz, with 64-bit Unique ID and WORM user area, ISO15693 and ISO18000-3 Mode 1 compliant
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.LRI64-A1T.pdf
(52 pages)
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Request processing by the LRI64
16.1
Note:
28/52
Explanation of the possible cases
Figure 21
sequence when the number of slots is 16.
The different steps are:
The decision to interrupt the anti-collision sequence is up to the VCD. It could have
continued to send EOFs until Slot 15 and then send the Request to LRI64 #1.
The VCD sends an Inventory Request, in a frame, terminated by a EOF. The number of
slots is 16.
LRI64 #1 transmits its Response in Slot 0. It is the only one to do so, therefore no
collision occurs and its UID is received and registered by the VCD;
The VCD sends an EOF, to switch to the next slot.
In slot 1, two LRI64 devices, #2 and #3, transmit their Responses. This generates a
collision. The VCD records it, and remembers that a collision was detected in Slot 1.
The VCD sends an EOF, to switch to the next slot.
In Slot 2, no LRI64 transmits a Response. Therefore the VCD does not detect a LRI64
SOF, and decides to switch to the next slot by sending an EOF.
In slot 3, there is another collision caused by Responses from LRI64 #4 and #5
The VCD then decides to send a Request (for instance a Read Block) to LRI64 #1,
whose UID was already correctly received.
All LRI64 devices detect a SOF and exit the anti-collision sequence. They process this
Request and since the Request is addressed to LRI64 #1, only LRI64 #1 transmits its
Response.
All LRI64 devices are ready to receive another Request. If it is an Inventory command,
the slot numbering sequence restarts from 0.
summarizes the main possible cases that can occur during an anti-collision
LRI64