M470L1714BT0-CA0 SAMSUNG [Samsung semiconductor], M470L1714BT0-CA0 Datasheet - Page 9

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M470L1714BT0-CA0

Manufacturer Part Number
M470L1714BT0-CA0
Description
128MB DDR SDRAM MODULE(16Mx64 based on 8Mx16 DDR SDRAM)
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
AC OPERATING TEST CONDITIONS
Input/Output CAPACITANCE
M470L1714BT0
Input capacitance(A
Input capacitance(CKE
Input capacitance( CS
Input capacitance( CLK
Data & DQS input/output capacitance(DQ
Input capacitance(DM
Input reference voltage for Clock
Input signal maximum peak swing
Input Levels(V
Input timing measurement reference level
Output timing measurement reference level
Output load condition
IH
/V
IL
Parameter
)
0
Parameter
~ A
0
0
~DM
0
, CS
0
)
, CLK
11
, BA
1
8
)
)
1
Output
)
0
~ BA
(V
DD
1
,RAS,CAS, WE )
=2.5V, V
Output Load Circuit (SSTL_2)
0
~DQ
(V
Z0=50
DD
63
DDQ
C
)
=2.5V, V
LOAD
=2.5V, T
=30pF
V
tt
DDQ
=0.5*V
A
Symbol
= 25
C
=2.5V, T
V
C
C
C
C
C
OUT
REF
R
IN1
IN2
IN3
IN4
IN5
See Load Circuit
DDQ
T
=50
C
+0.31/V
0.5 * V
, f=1MHz)
200pin DDR SDRAM SODIMM
V
=0.5*V
Value
REF
V
A
1.5
V
= 0 to 70
REF
tt
DDQ
REF
DDQ
Min
-0.31
36
36
26
34
12
12
C
)
Rev. 0.1 June. 2001
Max
44
44
30
38
14
14
Unit
V
V
V
V
V
Unit
pF
pF
pF
pF
pF
pF
Note

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