EDI8L32128V15AI WEDC [White Electronic Designs Corporation], EDI8L32128V15AI Datasheet - Page 2

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EDI8L32128V15AI

Manufacturer Part Number
EDI8L32128V15AI
Description
128Kx32 CMOS High Speed Static RAM
Manufacturer
WEDC [White Electronic Designs Corporation]
Datasheet
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specifi cation is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
July 2004
Rev. 6
G#
X
H
X
L
Voltage on any pin relative to V
Operating Temperature T
Storage Temperature
Power Dissipation
Output Current.
Junction Temperature, T
ABSOLUTE MAXIMUM RATINGS*
Commercial
Industrial
E#
H
L
L
L
Typical:T
Parameter
Operating Power Supply Current
Standby (TTL) Supply Current
Full Standby CMOS
Supply Current
Input Leakage Current
Output Leakage Current
Output High Volltage
Output Low Voltage
W#
H
H
X
L
A
White Electronic Designs
=25°C, V
TRUTH TABLE
Output Deselect
J
A
CC
Standby
Mode
Read
(Ambient)
Write
=3.3V
SS
Output
-55°C to +125°C
High Z
High Z
-40°C to +85°C
DC ELECTRICAL CHARACTERISTICS
D
0°C to + 70°C
-0.5V to 4.6V
D
OUT
IN
3 Watts
20 mA
175°C
Sym
I
I
I
V
V
CC1
CC2
CC3
I
I
LO
OH
LI
OL
I
CC2
Power
I
I
I
CC1
CC1
CC1
, I
W# = V
E# V
CC3
V
V
V I/O = 0V to V
V
IN
IN
E# V
I
IN
Conditions
OH
I
OL
Min Cycle
V
= 0V to V
V
V
IH
IL
IN
= -4.0mA
= 8.0mA
IH
CC
, II/O = 0mA,
, V
, f=ØMH
CC
-0.2V or
0.2V
IN
-0.2V
V
2
CC
IL
CC
RECOMMENDED DC OPERATING CONDITIONS
or
Z
Input High Voltage
Input Low Voltage
These parameters are sampled, not 100% tested.
Supply Voltage
Supply Voltage
Parameter
Address Lines
Data Lines
Write & Output Enable Lines
Chip Enable Lines
Parameter
Min
2.4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
(note: For t
Q
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Figure 1
Z0 = 50 Ω
680
120
AC TEST CONDITIONS
12
40
EHQZ
V
(f=1.0MH
L
,t
Sym
V
CAPACITANCE
V
= 1.5V
V
V
GHQZ
CC
SS
IH
R
IL
L
= 50 Ω
±10
±10
Max
660
120
0.4
15
40
and t
Z
3. 135V
, V
WLQZ
Min
-0.3
EØ# - E3#
2.2
65 pF
IN
0
W#, G#
=V
CD/Q
Sym
, CL = 5pF) (see fi gure 2)
CA
620
120
20
40
CC
D
OUT
EDI8L32128V
Figure 2
or V
Typ
3.3
353 Ω
0
SS
V
)
SS
Figure 1
Max
Units
1.5V
40
10
40
mA
mA
mA
5ns
µA
µA
8
ns
to 3.0V
V
V
V
3.465V
CC
Max
0.8
0
+0.3
V
CC
5 pF
319
Unit
pF
pF
pF
pF
Units
V
V
V
V

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