GS82032AQ-5I GSI [GSI Technology], GS82032AQ-5I Datasheet - Page 16
GS82032AQ-5I
Manufacturer Part Number
GS82032AQ-5I
Description
64K x 32 2M Synchronous Burst SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS82032AQ-5I.pdf
(23 pages)
- Current page: 16 of 23
- Download datasheet (659Kb)
Rev: 1.09 7/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Flow Through Read-Write Cycle Timing
DQ
A
A0–An
B
ADSC
ADSP
–DQ
A
ADV
GW
–B
BW
CK
E
E
E
G
D
D
1
2
3
Hi-Z
tS tH
tS
tS tH
tS
tS
RD1
tH
tH
tH
tKQ
Single Read
tOE
tS tH
tS tH
tS
Q1
tOHZ
A
E2 and E3 only sampled with ADSP and ADSC
tKH
16/23
tKL
tH
tKC
Single Write
tS
tS tH
tS tH
D1
WR1
WR1
A
tH
RD2
ADSC initiated read
ADSP is blocked by E inactive
Burst wrap around to it’s initial state
Q2
GS82032AT/Q-180/166/133/100
A
E1 masks ADSP
Burst Read
Q2
B
© 2000, Giga Semiconductor, Inc.
Deselected with E3
Q2
C
Q2
D
Q2
A
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