GS880E32T-100 GSI [GSI Technology], GS880E32T-100 Datasheet - Page 25

• Manufacturer Part Number: GS880E32T-100
• Description: 512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs
• Manufacturer: GSI [GSI Technology]

Revision History
Rev: 1.11 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
1999K880E18/32/36T1.06 1/
GS880E18/32/36TRev1.04h
GS880E18/32/36T1.05 11/
GS880E18/32/36T1.06 1/
GS880E18/32/36T1.07 3/
GS880E18/32/36T1.07 3/
GS880E18/32/36T1.08 3/
DS/DateRev. Code: Old;
GS880E18/32/36T1.08 3/
880E183236_r1_09
880E18_r1_09;
880E18_r1_10;
880E18_r1_10
880E18_r1_11
1.05 9/1999I
5/1999;
2000N;
2000N;
2000O;
2000O;
2000L;
2000L
New
Format or Content
Types of Changes
Content/Format
Format/Typos
Content
Content
Content
Content
Content
Content
25/25
• Last Page/Fixed “GSGS..” in Ordering Information Note.
• Fromatted Pin Outs and Pin Description to new small caps.
• Formatted Block diagrams to new small caps.
• Formatted Timing Diagrams to new small caps.
• Changed “Flow thru” to “Flow Through” in Timing Diagrams.
• Package Diagram/Changed “Dimesion” to “Dimension”.
• 5/Fixed pin description table to match pinouts.
• Pin Description/Changed chip enables to match pins.
• Pin Description/Changed pin 80 from NC to Address Input.
• Pin Description/Rearranged Address Inputs to match order of
• Package Diagram/Changed Dimension D Max from 20.1 to
• Changed Flow Through Read-Write Cycle Timing Diagram for
• Changed order of TQFP Address Inputs to match pinout.
• Changed order of TQFP DATA Input and Output pins to
• New GSI Logo.
• Changed all speed bin information (headings, references,
• Corrections to AC Electrical Characteristics Table -
• Removed 150 MHz speed bin
• Changed 133 MHz and 117 MHz speed bins to 11 ns and
• Updated format to comply with Technical Publications
• Updated Capitance table—removed Input row and changed
• Corrected typo in AC Electrical Characteristics table
Page;Revisions;Reason
Pinout
22.1
accuracy.
match pinout.
tables, ordering info..) to reflect 150 - 80Mhz
11.5 ns (100 MHz) numbers
standards
Output row to I/O
GS880E18/32/36T-11/11.5/100/80/66
© 2000, Giga Semiconductor, Inc.
Preliminary