GS8644ZV18B-150I GSI [GSI Technology], GS8644ZV18B-150I Datasheet - Page 26

• Manufacturer Part Number: GS8644ZV18B-150I
• Description: 72Mb Pipelined and Flow Through Synchronous NBT SRAM
• Manufacturer: GSI [GSI Technology]

TMS
TCK
TDI
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Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Tap Controller Instruction Set
Overview
There are two classes of instructions defined in the Standard 1149.1-1990; the standard (Public) instructions, and device specific
(Private) instructions. Some Public instructions are mandatory for 1149.1 compliance. Optional Public instructions must be
implemented in prescribed ways. The TAP on this device may be used to monitor all input and I/O pads, and can be used to load
address, data or control signals into the RAM or to preload the I/O buffers.
When the TAP controller is placed in Capture-IR state the two least significant bits of the instruction register are loaded with 01.
When the controller is moved to the Shift-IR state the Instruction Register is placed between TDI and TDO. In this state the desired
instruction is serially loaded through the TDI input (while the previous contents are shifted out at TDO). For all instructions, the
TAP executes newly loaded instructions only when the controller is moved to Update-IR state. The TAP instruction set for this
device is listed in the following table.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
Boundary Scan Register
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1
0
Control Signals
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2
1
0
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JTAG TAP Block Diagram (2-die module)
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TDO
GS8644ZV18(B/E)/GS8644ZV36(B/E)/GS8644ZV72(C)
TDI
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Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
31 30 29
2
0
Boundary Scan Register
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1
0
Control Signals
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2
1
0
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© 2003, GSI Technology
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TDO