ATR0621-7FQY ATMEL [ATMEL Corporation], ATR0621-7FQY Datasheet - Page 8

• Manufacturer Part Number: ATR0621-7FQY
• Description: GPS Baseband Processor
• Manufacturer: ATMEL [ATMEL Corporation]

Table 3-1.
3.2
Table 3-2.
8
Notes:
VDD_USB
Pin Name LFBGA100
VDDIO
XT_OUT
Module
USART
VBAT18
APMC
VDD18
VDD18
VDD18
XT_IN
USB
RTC
EBI
Signal Description
(2)
1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset
2. VDDIO is the supply voltage for the following GPIO pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
3. VDD_USB is the supply voltage for the following USB pins: USB_DM and USB_DP. For operation of the USB interface, sup-
ATR0621 [Preliminary]
(3)
P25, P26, P27 and P29
ply of 3.0V to 3.6V is required.
EM_DA0 to EM_DA15 External Memory Data Bus
EM_A0 to EM_A21
ATR0621 Pinout (Continued)
ATR0621 Signal Description
NCS0 to NCS1
NCS2 to NCS3
BOOT_MODE
J10
G6
E6
F7
F6
E5
F5
J9
USB_DM
USB_DP
NSLEEP
XT_OUT
RXD1-2
NSHDN
TXD1-2
SCK1-2
RF_ON
NWR0
NWR1
XT_IN
Name
NWE
NRD
NOE
NUB
NLB
Pin Type
OUT
OUT
IN
IN
IN
IN
IN
IN
Function
External Memory Address Bus
Chip Select
Chip Select
Lower Byte Write Signal
Upper Byte Write Signal
Read Signal
Write Enable
Output Enable
Upper Byte Select (16-bit SRAM)
Lower Byte Select (16-bit SRAM)
Boot Mode Input
Transmit Data Output
Receive Data Input
External Synchronous Serial
Clock
USB Data (D+)
USB Data (D-)
Sleep Output
Shutdown Output
Oscillator Input
Oscillator Output
(Reset Value)
Pull Resistor
(1)
Firmware Label
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
Input
Input
Input
I/O
I/O
I/O
I/O
Active Level Comment
PIO Bank A
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
–
–
–
–
–
–
–
–
–
–
–
All valid after reset
Internal pull-down resistor
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
Output High in RESET state
PIO-controlled after reset,
internal pull-down resistor
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
Interface to ATR0600
Interface to ATR0600
Connect to pin LDO_EN
RTC oscillator
RTC oscillator
PIO Bank B
4890AS–GPS–09/05