AFBR-732BE HP [Agilent(Hewlett-Packard)], AFBR-732BE Datasheet - Page 11

• Manufacturer Part Number: AFBR-732BE
• Description: Ultra Short Link Pluggable Parallel Fiber Optic Modules, Transmitter and Receiver
• Manufacturer: HP [Agilent(Hewlett-Packard)]

Table 1. Transmitter Module Pad Description
Table 2. Receiver Module Pad Description
11
Symbol
V
V
DIN0+ through DIN11+
DIN0– through DIN11–
TX_EN
TX_DIS
RESET-
FAULT-
DNC
Symbol
V
V
V
DOUT0+ through DOUT11+
DOUT0– through DOUT11–
SD
RX_EN
SQ_EN
EN_SD
DNC
EE
CC
EE
CC
PP
T
R
Functional Description
connect these pads to transmitter signal ground plane.
see Figure 11.
see Figure 11.
"0") FAULT- disables the VCSEL array and is cleared by RESET- or power cycling V
LVTTL compatible output.
Do not connect to any electrical potential.
Functional Description
Receiver Signal Common. All voltages are referenced to this potential unless otherwise indicated. Directly
connect these pads to receiver signal ground plane.
Receiver Power Supply. Use recommended power supply filter circuit in Figure 5.
Not required for Agilent product. Pads not internally connected
Receiver Data Out+ for channels 0 through 11, respectively. Terminate these high-speed differential CML outputs
insufficient input signal level.
Receiver Data Out- for channel 0 through 11, respectively. Terminate these high-speed differential CML outputs
insufficient input signal level.
Signal Detect. Normal optical input levels to all channels results in a logic "1" output, V
optical levels to any channel results in a fault condition indicated by a logic "0" output, V
single-ended LVTTL compatible output.
Receiver output enable. Active high (logic "1"), internal pull-up. Low (logic "0") = receiver outputs disabled, all
outputs are high (logic "1").
Squelch enable input. Active high (logic "1"), internal pull-up. Low (logic "0") = squelch disabled. When SQ_EN
is high and SD is low, corresponding outputs are squelched.
Enable Signal Detect. Active high (logic "1"), internal pull-up. Low (logic "0") = Signal detect output forced
active high.
Do not connect to any electrical potential.
Transmitter Signal Common. All voltages are referenced to this potential unless otherwise indicated. Directly
Transmitter Power Supply. Use recommended power supply filter circuit in Figure 6.
Transmitter Data In+ for channels 0 through 11, respectively. Differential termination and self bias are included,
Transmitter Data In- for channels 0 through 11, respectively. Differential termination and self bias are included;
TX Enable. Active high. Internal pull-up High = VCSEL array is enabled if TX_DIS is inactive (Low). Low =
VCSEL array is off. TX_EN must be taken to a logic low state level (V
TX Disable. Active high. Internal pull-down Low = VCSEL array is enabled if TX_EN is active (High). High =
VCSEL array is off. TX_DIS must be taken to a logic High state level (V
Transmitter RESET- input. Active low. Internal pull-up. Low = Resets logic functions, clears FAULT- signal,
VCSEL array is off. high = Normal operation. See Figure 14.
Transmitter FAULT- output. Active low. Low (logic "0") results from a VCSEL over-current condition, out of
temperature range, or EEPROM calibration data corruption condition detected for any VCSEL. An asserted (logic
with standard CML techniques at the inputs of the receiving device. Individual data outputs will be squelched for
with standard CML techniques at the inputs of the receiving device. Individual data outputs will be squelched for
OL
) for 1 ms or longer.
OH
) for 1 ms or longer.
CC
T FAULT- is a single ended
OH
OL
, asserted. Low input
, de-asserted. SD is a