IXP45X INTEL [Intel Corporation], IXP45X Datasheet - Page 124
IXP45X
Manufacturer Part Number
IXP45X
Description
Product Line of Network Processors
Manufacturer
INTEL [Intel Corporation]
Datasheet
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Table 63.
Figure 30.
Figure 31.
Intel
Datasheet
124
®
IXP45X and Intel
DDRI_RCVENOUT_N
DDRI_DQ, _CB, _DM
DDRI_RCVENIN_N
DDRI SDRAM Read Timings (2.0 CAS Latency)
DDRI SDRAM Read Timings (2.5 CAS Latency)
DDRI SDRAM Write Timings Values (Sheet 2 of 2)
Notes:
1.
Symbol
DDRI_RCVENOUT_N
DDRI_DQ, _CB, _DM
DDRI_M_CLK
DDRI_RCVENIN_N
T
T
T
®
4
5
6
DDRI_DQS
IXP46X Product Line of Network Processors
DDRI_M_CLK
DDRI_M_CLK is representative of all DDRI_CK and DDRI_CK_N signals. The rising edge of
DDRI_M_CLK represents the crossover point of the respective DDRI_CK and DDRI_CK_N signals.
The skew between the separate DDR clocks have been compensated in the timings which have been
described. The period to period clock jitter on each DDRI_M_CLK pair is spec’ed at +/-100ps.
DDRI_DQS
ADDR/CTRL output hold time after the rising
edge of the DDRI_M_CLK. Address and control
signals consist of DDRI_RAS_N, DDRI_CAS_N,
DDRI_CS_N, DDRI_WE_N, DDRI_BA, DDRI_MA,
and DDRI_CKE.
Output valid for DDRI_DQ, DDRI_CB, and
DDRI_DM prior to each edge of DDRI_DQS.
DDRI_DQ, DDRI_CB, and DDRI_DM output hold
time after each edge of the DDRI_DQS.
Intel
®
IXP45X and Intel
Parameter
RD CMD
RD CMD
®
IXP46X Product Line of Network Processors—Datasheet
T
T
1
2
T
T
1
2
T
5
T
D0
5
Min.
2.3
1.0
1.0
D0
T
D1
6
Document Number:
D1
T
6
D2
T
Max.
3
D2
T
4
T
D3
3
T
4
D3
D4
D4
Units
ns
ns
ns
D5
306261-004US
D5
August 2006
D6
1
D6
Notes
D7
D7
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