SRI4K-SBN181GE STMICROELECTRONICS [STMicroelectronics], SRI4K-SBN181GE Datasheet - Page 16

• Manufacturer Part Number: SRI4K-SBN181GE
• Description: 13.56 MHz short-range contactless memory chip with 4096-bit EEPROM and anticollision functions
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Memory mapping
4.2
16/45
32-bit binary counters
The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to
count down from 2
the update of a counter if the new value is lower than the previous one. This feature allows
the application to count down by steps of 1 or more. The initial value in Counter 5 is
FFFF FFFEh and is FFFF FFFFh in Counter 6. When the value displayed is 0000 0000h,
the counter is empty and cannot be reloaded. The counter is updated by issuing the
Write_block command to block address 5 or 6, depending on which counter is to be
updated. The Write_block command writes the new 32-bit value to the counter block
address.
The counter programming cycles are protected by automated antitearing logic. This function
allows the counter value to be protected in case of power down within the programming
cycle. In case of power down, the counter value is not updated and the previous value
continues to be stored.
Figure 15. Binary counter (addresses 5 to 6)
Figure 16. Countdown example (binary format)
The counter with block address 6 controls the Reload command used to reset the resettable
OTP area (addresses 0 to 4). Bits b
of these 11 bits is updated, the SRI4K detects the change and adds an Erase cycle to the
Write_block command for locations 0 to 4 (see the
Erase cycle remains active until a Power-off or a Select command is issued. The SRI4K’s
resettable OTP area can be reloaded up to 2 047 times (2
Initial data
1-unit decrement
1-unit decrement
1-unit decrement
8-unit decrement
Increment not allowed
Block
Address
5
6
Figure 16
MSb
b31
32
shows examples of how the counters operate.
(4096 million) to 0. The SRI4K uses dedicated logic that only allows
b31
1
1
1
1
1
1
b24 b23
...
...
...
...
...
...
1
1
1
1
1
1
31
32-bit binary counter
32-bit binary counter
to b
1
1
1
1
1
1
32-bit block
b16 b15
21
1
1
1
1
1
1
act as an 11-bit Reload counter; whenever one
1
1
1
1
1
1
“Resettable OTP
1
1
1
1
1
1
1
1
1
1
1
1
11
b8 b7
-1).
1
1
1
1
1
1
1
1
1
1
1
1
LSb
area” paragraph). The
b0
1
1
1
1
1
1
1
1
1
1
0
1
Description
Count down
1
1
1
1
1
0
Counter
1
1
0
0
0
0
ai07661
ai07660b
SRI4K
1
0
1
0
0
0
b0