KMM372C400CK SAMSUNG [Samsung semiconductor], KMM372C400CK Datasheet - Page 6

• Manufacturer Part Number: KMM372C400CK
• Description: 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V
• Manufacturer: SAMSUNG [Samsung semiconductor]

DRAM MODULE
NOTES
1.
2.
3.
4.
5.
6.
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are Vih/Vil. V
reference levels for measuring timing of input signals. Transi-
tion times are measured between V
are assumed to be 5ns for all inputs.
Measured with a load equivalent to 2TTL loads and 100pF.
Operation within the
can be met.
If
access time is controlled exclusively by
Assumes that
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
V
OL
t
RCD
.
is greater than the specified
t
RCD
t
RCD
(max) is specified as a reference point only.
t
RCD
t
RCD
(max).
(max) limit insures that
IH
IH
(min) and V
(min) and V
t
RCD
t
CAC
(max) limit, then
.
IL
IL
(max) and
t
(max) are
RAC
(max)
OH
or
10.
11.
8.
9.
7.
t
data sheet as electrical characteristic only. If
the cycle is an early write cycle and the data out pin will
remain high impedance for the duration of the cycle.
Either
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
can be met.
t
access time is controlled by
The timing skew from the DRAM to the DIMM resulted from
the addition of buffers.
WCS
RAD
is not restrictive operating parameter. It included in the
is greater than the specified
t
RCH
or
t
RAD
t
RRH
(max) is specified as reference point only. If
must be satisfied for a read cycle.
t
RAD
KMM372C400CK/CS
KMM372C410CK/CS
(max) limit insures that
t
AA
.
t
RAD
(max) limit, then
t
WCS
t
t
RAC
WCS
(max)
(min)