KMM5328004BSW SAMSUNG [Samsung semiconductor], KMM5328004BSW Datasheet - Page 5

• Manufacturer Part Number: KMM5328004BSW
• Description: 8M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V
• Manufacturer: SAMSUNG [Samsung semiconductor]

DRAM MODULE
AC CHARACTERISTICS
NOTES
Test condition : V
Hyper page mode cycle time
CAS precharge time (Hyper page cycle)
RAS pulse width (Hyper page cycle)
RAS hold time from CAS precharge
W to RAS precharge time(C-B-R refresh)
W to RAS hold time(C-B-R refresh)
Output data hold time
Output buffer turn off delay from RAS
Output buffer turn off delay from W
W to data delay
W pulse width
1.
2.
3.
4.
5.
6.
7.
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are V
erence levels for measuring timing of input signals. Transi-
tion times are measured between V
are assumed to be 5ns for all inputs.
Measured with a load equivalent to 2 TTL loads and 100pF.
Operation within the
can be met.
If
access time is controlled exclusively by
Assumes that
This parameter defines the time at which the output achieves
the open circuit and is not referenced for V
t
the data sheet as electrical characteristics only. If
t
data out pin will remain high impedance for the duration of
the cycle.
WCS is
WCS
t
RCD
t
WCS
non-restrictive operating parameter. It is included in
is greater than the specified
ih
(min), the cycle is an early write cycle and the
/V
t
RCD
Parameter
il
t
=2.6/0.8V, V
RCD
(max) is specified as a reference point only.
t
RCD
t
RCD
(max).
ih
(max) limit insures that
/V
oh
(0 C T
il
/V
. V
ol
IH
=2.0/0.8V, output loading CL=100pF
(min) and V
IH
A
(min) and V
70 C, Vcc=5.0V 10%. See notes 1,2.)
t
RCD
t
CAC
OH
(max) limit, then
.
t
t
t
t
t
t
t
t
t
t
t
IL
or V
HPC
CP
RASP
RHCP
WRP
WRH
DOH
REZ
WEZ
WED
WPE
Symbol
(max) are ref-
IL
OL
(max) and
t
RAC
.
(max)
Min
20
50
30
10
10
15
8
5
3
3
5
10.
11.
12.
8.
9.
Either
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
can be met.
t
is controlled by
t
If RAS goes high before CAS high going, the open circuit
condition of the output is achieved by CAS high going. If CAS
goes high before RAS high going , the open circuit condition
of the output is achieved by RAS going.
RAD
ASC
-5
is greater than the specified
200K
6ns, Assume t
Max
t
13
13
RCH
or
KMM5328004BSW/BSWG
t
RAD
t
RRH
t
AA
(max) is specified as reference point only. If
Min
.
25
10
60
35
10
10
15
must be satisfied for a read cycle.
T
5
3
3
5
=2.0ns.
t
RAD
-6
(max) limit insures that
200K
Max
15
15
t
RAD
(max) limit access time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RAC
Note
6,12
11
6
(max)