LUCL9218AAR-D AGERE [Agere Systems], LUCL9218AAR-D Datasheet - Page 15

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LUCL9218AAR-D

Manufacturer Part Number
LUCL9218AAR-D
Description
Low-Cost Line Interface
Manufacturer
AGERE [Agere Systems]
Datasheet
Data Sheet
November 2001
Agere Systems Inc.
Applications
A basic loop start reference circuit, using bused ringing with the L9218 SLIC and the T7504 first-generation codec,
is shown in Figure 11. This circuit is designed for a 200
transhybrid. Transmit gain is set at 0 dBm and receive gain is set at –7 dBm.
Table 9 shows the design parameters of the application circuit shown in Figure 11. Components that are adjusted
to program these values are also shown.
Table 9. 200
Loop Closure Threshold
dc Loop Current Limit
2-wire Signal Overload Level
ac Termination Impedance
Hybrid Balance Line Impedance
Transmit Gain
Receive Gain
RING
TIP
V
402
RING
R
TS1
V
LCAS
BAT
EMR
Design Parameter
0.015 F
35.7 k
2.94 M
3.32 M
22.1 k
R
50
50
R
R
R
R
C
R
PROG
PT
PR
LCTH
TSP
RTS1
TSN
680
Figure 11. Basic Loop Start Application Circuit Using T7504-Type Codec
L7591
18
10
20
19
7
8
0.1 F First-Generation Codec Design Parameters
LCTH
DCOUT
PT
PR
RTSP
RTSN
I
PROG
1
11
CF2
0.47 F
9
V
V
BAT
BAT
C
F1
12
CF1
0.1 F
C
BAT
0.1 F
L9218
SLIC
C
F2
4
200
200
V
V
16
CC
CC
AGND
Parameter Value
0.1 F
C
CC
17
3.14 dBm
BGND
–7 dBm
10 mA
20 mA
0 dBm
680
680
680
NSTAT
B2/NC
RCVN
RCVP
VITR
TSD
VTX
TXI
TG
B1
B0
0.1 F
0.1 F
26
25
24
23
5
6
27
22
13
14
15
0.1 F complex termination impedance and
71.5 k
R
30.1 k
L9218A/G Low-Cost Line Interface
GP
0.1 nF
R
CONTROL
INPUTS
SUPERVISION
OUTPUTS
C
T1
GN
C
0.1 F
R
8.06 k
B
GP1
80.6 k
2.37 k
137.0 k
R
R
143.0 k
R
R
T2
N1
GS
RCV
18.2 k
R
R
T1
N2
0.47 F
Components Adjusted
, R
6.8 nF
C
R
357 k
0.47 F
C
R
B1
HB1
GS
C
GP
T2
B2
R
, R
, R
RCV
158.0 k
VF
X,
RCV,
R
R
R
1/4 T7504
+
, R
R
X
R
CODEC
R
PROG
LCTH
O
HB1
N1,
+2.4 V
GP
R
GP1,
MCLK
R
, R
FSR
GSX
FSX
DX
N2,
DR
T1
R
C
GS,
HIGHWAY
CONTROL
N
CLOCK
PCM
AND
C
2797 (F).a
GS
15

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