LUCL9311AP-D AGERE [Agere Systems], LUCL9311AP-D Datasheet - Page 12

• Manufacturer Part Number: LUCL9311AP-D
• Description: Line Interface and Line Access Circuit Full-Feature SLIC with High Longitudinal Balance, Ringing Relay,and GR-909 Test Access
• Manufacturer: AGERE [Agere Systems]

Ringing Relay, and GR-909 Test Access
Operating States
Input State Coding
Data control is via a parallel latched data control scheme. Data latches are edge-level sensitive. Data is latched in
when the LATCH control input goes low. Data must be set up 200 ns before LATCH goes low and held 50 ns after
LATCH goes high. While LATCH is low, the user should not change the data control inputs at B0, B1, B2, and B3.
The data control inputs at B0, B1, B2, and B3 may only be changed when LATCH is high. NSTAT supervision out-
put is not controlled by the LATCH control input.
Table 2. Primary Control States
Table 3. Secondary Control States
Table 4. Supervision Coding
12
0 = off-hook or ring trip
1 = on-hook and no ring trip
B3
B3
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Pin NSTAT
B2
B2
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
(continued)
(continued)
B1
B1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0 = ring ground
1 = no ring ground
B0
B0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Pin TRGDET
TESTLEV, TESTSIG Tip/Ring voltage
TESTLEV, TESTSIG Tip voltage
TESTLEV, TESTSIG Ring voltage
TESTLEV, TESTSIG VTX—current
TESTLEV
TESTLEV, TESTSIG VITR—current
RESET
1
1
1
1
1
1
1
1
0
Active
—
—
Scan
Powerup, forward battery
Powerup, reverse battery
Tip and ring amp
Ring
Tip amp
Ring amp
Disconnect, break before make
Disconnect, break before make
V
Unassigned
TESToff
REF
State
State
Agere Systems Inc.
July 2001