PT6314-001L PTC [Princeton Technology Corp], PT6314-001L Datasheet
PT6314-001L
Related parts for PT6314-001L
PT6314-001L Summary of contents
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... It supports dot matrix displays columns x 2 lines, 20 columns x 2 lines or 24 columns x 2 lines. PT6314 also features a character generator ROM which stores 240 dos characters. Pin assignments and application circuits are optimized for easy PCB layout and cost saving advantages ...
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... DB1 Buffer 8 DB2 Register DB3 DB4 DB5 DB7 /RESET Reset Circuit MPU DS0 DS1 DLS RL1 SG1 SG2 SG3 SG4 SG5 SG6 SG7 PT6314 V1.3 VDD1 VDD2 VSS1 VSS2 Address Counter Instruction Decoder 8 Data 8 7 Character Generator RAM (CGRAM) 8x5x8 Bits ...
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... Pin No 71 108, 110 to 119 are used as Segment Signal Output Pins, Pin No.120 to 143 are used as Grid Signal Output Pins and are configured according to the Tables shown in the Duty Ratio Setting Section (see pages 7 to 13). PT6314 V1.3 PT6314 - 3 - Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www ...
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... Data Bus. Under the Serial Data Transfer Mode, this pin functions as the Shift Clock Input Pin. Data is written at the rising edge. Note: *=N is the Display Line Select Flag in “Function Set” Command PT6314 V1.3 Description 1: 2 lines are selected (N=”1”)* - 4 - ...
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... This pin is used to select the interface mode: i80 or M68. 0: i80 CPU Mode Chip Select Pin /CS I When this pin is set to “L” the PT6314 is active. Segment Output Select Pin RL1,RL2 I This pins are used to set SG1 to SG80. Extension Grid Driver Clear Signal Output Pin ...
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... Dot Character VFD Controller/Driver IC DUTY RATIO SETTING DS0 and DS1 control the duty ratio of PT6314. Please refer to the table below. DS0 Please take note that the external extension grid driver is needed to set up 1/40 duty mode. SEGMENT SETTING CONDITION 1: 2-LINE DISPLAY (N=“1”), RL1=“0” AND RL2=“0” ...
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... SG26 52 SG25 53 SG24 54 SG68 106 SG69 107 SG70 108 NC 109 SG71 110 SG72 111 SG73 112 SG74 113 SG75 114 SG76 115 PT6314 V1.3 Pin No. Pin Name SG23 55 NC SG22 56 SG6 SG21 57 SG5 SG20 58 SG4 SG19 59 SG3 SG18 60 SG2 SG17 61 SG1 SG16 62 ...
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... SG55 52 SG56 53 SG57 54 SG13 106 SG12 107 SG11 108 NC 109 SG10 110 SG9 111 SG9 112 SG7 113 SG6 114 SG5 115 PT6314 V1.3 Pin No. Pin Name SG58 55 NC SG59 56 SG75 SG60 57 SG76 SG61 58 SG77 SG62 59 SG78 SG63 60 SG79 SG64 61 SG80 SG65 62 ...
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... SG66 52 SG65 53 SG64 54 SG13 106 SG12 107 SG11 108 NC 109 SG10 110 SG9 111 SG9 112 SG7 113 SG6 114 SG5 115 PT6314 V1.3 Pin No. Pin Name SG63 55 NC SG62 56 SG75 SG61 57 SG76 SG60 58 SG77 SG59 59 SG78 SG58 60 SG79 SG57 61 SG80 SG56 62 ...
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... SG12 49 SG13 50 SG14 51 SG15 52 SG16 53 SG17 54 * 106 * 107 * 108 NC 109 * 110 * 111 * 112 * 113 * 114 * 115 Note: *=Not Used PT6314 V1.3 Pin No. Pin Name SG18 55 NC SG19 56 SG35 SG20 57 SG36 SG21 58 SG37 SG22 59 SG38 SG23 60 SG39 SG24 61 SG40 SG25 62 * SG26 63 * SG27 64 * SG28 ...
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... SG29 49 SG28 50 SG27 51 SG26 52 SG25 53 SG24 54 * 106 * 107 * 108 NC 109 * 110 * 111 * 112 * 113 * 114 * 115 Note: *=Not Used PT6314 V1.3 Pin No. Pin Name SG23 55 NC SG22 56 SG6 SG21 57 SG5 SG20 58 SG4 SG19 59 SG3 SG18 60 SG2 SG17 61 SG1 SG16 62 * SG15 63 * SG14 64 * SG13 ...
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... Dot Character VFD Controller/Driver IC VFD DISPLAY PT6314 supports 24 character x 2 display lines. Please refer to the diagram below for VFD Display construction. SG1 SG40 SG41 SG80 GR1 GR2 GR24 SG1 SG5 SG6 SG10 SG71 SG75 SG76 SG80 PT6314 V1 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www ...
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... Dot Character VFD Controller/Driver IC FUNCTION DESCRIPTION BLOCK FUNCTIONS CPU INTERFACE PT6314 provides either bits parallel or serial interface. These interface modes may be selected using the IFSEL Pin (Pin No.24) as follows: REGISTERS (INSTRUCTION REGISTER & DATA REGISTER) PT6314 supports two 8-bit registers, namely: an Instruction Register (IR) and a Data Register (DR) which may be selected using the Register Selector (RS) Signal ...
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... R/W=”1”. Please refer to the table below. Common M68 RS R/W / PT6314 V1.3 I80 / Write IR Data as internal operation (i.e. display clear) Read data to busy flag (DB7) and Address Counter Write DR Data (DR→DDRAM/CGRAM Read DR Data (DDRAM/CGRAM→DR) ...
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... N=“0” 1-LINE DISPLAY, LESS THAN 80 CHARACTERS In cases when there are less than 80 display characters, the display begins at the head position. For example, if only one piece of PT6314 is being used, 24 characters are displayed. When the display shift operation is performed, the DDRAM address shifts, please refer to the figure below. ...
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... In cases when the number of display characters is less than lines, the two lines are displayed from the head. The line end address and the second line start address are not consecutive. For example, if only one PT6314 is being used, 24 characters x 2 lines are displayed. When the display shift operation is performed, the DDRAM address shifts. ...
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... The Character Code Bit 3 is irrelevant, the “P” Display shown above (Character Pattern No. 1) can be selected by either character Code 00H or 07H. 6. When CGRAM Data=“1” the Display is turned ON. When CGRAM data=“0” display is turned OFF. PT6314 V1.3 CGRAM Address A5 ...
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... RAM (DDRAM). Since the serial data is latched when the display data character pattern corresponding to the starting address enters the internal shift register, PT6314 drives from the head display. CURSOR/BLINK CONTROL CIRCUIT Cursor and Character blinking are generated by the Cursor / Blink Control Circuit. The cursor or the blinking will appear with the digit located at the display data RAM (DDRAM) address set in the address counter (AC) ...
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... The M68 type of parallel data transfer is selected when IFSEL is set to “1” and MCU is set to “0” Under this mode, the PT6314 can interface with the CPU bits . Please take note that the internal registers are composed of 8 bits. During data transfer in 4 bits, DB4 to DB7 performs the data transfer operation two times, the DB0 to DB3 must be set to either “ ...
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... RAM. The data of the specified address is not generated by the read instructions issued immediately after the address setup. This data is generated in the when the data is read the second time. Thus, a dummy read is required whenever the address setup or write cycle operation is selected. Please refer to the diagrams below. PT6314 V1.3 IR7 BF="0" IR6 ...
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... Dot Character VFD Controller/Driver IC Writing MPU /WR DATA Internal Timing Bus Holder Write Signal Reading MPU /WR /RD DATA Internal Timing Address Preset Read Signal Column Address Bus Holder PT6314 V1.3 N N+1 LATCH N N PRESET N INCRE MENT N Address Set Dummy #n Read - 21 - Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www ...
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... Dot Character VFD Controller/Driver IC SERIAL DATA TRANSFER PT6314 supports serial data transfer mode. When data is written, it can be inputted when the Strobe goes to “0”. The first byte -- Start Byte consists of a total of 8 bits : the Synchronous bits (bit 1 - bit 5), R/W (bit 6), RS (bit 7) and bit 8. The register will be selected (IR or DR) by the RS (bit 7) and the data write or read is selected by R/W (bit 6 = “ ...
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... DL=“1”: 8 Bits 7. N=“0”: 1-Line Display 8. BR1, BR0=“00”: 100% BR1, BR0=”01”: 75% 9. X=Irrelevant 10. DDRAM: Display Data RAM 11. CGRAM: Character Generator RAM 12. ACG: CGRAM Address 13. ADD: DDRAM Address 14. ACC: Address Counter PT6314 V1.3 DB6 DB5 DB DB DB2 ...
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... Sets the Address Counter to point to the Display Data RAM (DDRAM). 3. Sets the Display for Zero Character Shift (Returns to the original position the cursor is displayed, this instruction moves the cursor to the left most character in the upper line display. PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 ...
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... Display shifts one character to the right 0 1 without any cursor movement. Display shifts one character to the left 1 1 without any cursor movement. During Reset, DB7 DB6 0 0 PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB5 DB4 DB3 ...
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... The “R/L” Bit selects the left or right movement direction of the cursor and/or display. When “R/L”=”1” the cursor and/or display is shifted one character to the right. When “R/L” is ”0” the cursor and/or character is shifted to the left. PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 ...
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... Move one character to the left Move one character to the right Move one character to the left with display 1 1 Move one character to the right with display PT6314 V1.3 Cursor - 27 - Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT6314 Display No shift No shift Shift one character to the left ...
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... SGn G1 Gn where n = number of Grid (tDSP + tBLK) During Reset, DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 BR0 Brightness 0 100% 1 ...
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... This address counter is used by the CGRAM and DDRAM addresses and its values are determined by the previous instruction. Address counter contents are the same as that of “CGRAM Address Set” and “DDRAM Address Set” Instructions. Note: * The Busy Flag (BF) = “0” PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 ...
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... At this moment, the address counter’s target data cannot be read if the “Read Data from CGRAM or DDRAM” Instruction is executed. Thus, to read data correctly, the “Address Set” or “Cursor Shift” (if Read Data from DDRAM only) Instruction must be executed before reading. PT6314 V1.3 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 ...
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... Dot Character VFD Controller/Driver IC POWER ON RESET When PT6314 is initialized, the internal status after power supply has been reset is as follows: 1. Display Clear: 20H (space code) fills the DDRAM 2. Address Counter is set to 00H 3. Address Counter is pointed to the DDRAM 4. Display ON/OFF: D=0, C=0, B=0 (Display OFF) 5 ...
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... Dot Character VFD Controller/Driver IC CGRAM STROKE FLOWCHART Increment or Decrement DDRAM STROKE FLOWCHART Increment or Decrement PT6314 V1.3 Set CGRAM Address Read Set CGRAM Address Write Write Data To CGRAM Set DDRAM Address Read Set DDRAM Address Write Write Data To DDRAM - 32 - Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www ...
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... Logic power supply voltage Logic system input voltage Driver power supply voltage Segment Drive output current Grid Note recommended that the order in which power applied to the chipset is as follows: VDD1 → Input → VDD2 PT6314 V1.3 Symbol VDD1 Vi Vo VDD2 VO2 IOL2S ...
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... Note: The Typical (Typ.) Value is a reference value when Ta=25 ℃ . SWITCHING CHARACTERISTICS (Unless otherwise specified, Ta=-40 to +85 ℃ , VDD1=5.0 ± 10%) Parameter Oscillation frequency Operation frequency Rise time Rise time (see Note 2) Fall time PT6314 V1.3 Symbol Condition VIH1 Logic, Expect E/SCK,RESET 0.7VDD1 Logic, Expect E/SCK,RESET, VIL1 DLS VIH2 ...
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... M68 Interface Parallel Data Transfer: Read (VDD1=5.0 ± 10%) Parameter Enable cycle time Enable “H” pulse width Enable ”L” pulse width RS, R setup time RS, R hold time Data delay time Data hold time PT6314 V1 90% 10% Symbol Condition E ↑ → E ↑ tCYCE PWEH PWEL RS,R/W → ...
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... Dot Character VFD Controller/Driver IC PARALLEL I/F (M68 INPUT) DB0 to DB7 PARALLEL I/F (M68 OUTPUT) DB0 to DB7 Notes: 1. Input Signal Rise Time and Fall Time (tF, tR) < 15ns. 2. All timing is specified using 0.20VDD1 and 0.80VDD1 as reference. 3. PWEH is the overlap between /CS=”L” and E. PT6314 V1.3 RS R/W tAS / tDS ...
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... (READ) Notes: 1. Input signal rise time and fall time (tF, tR) < 15ns 2. All timing is specified using 0.20VDD1 and 0.80VDD1 as reference. 3. tCCLW and tCCLR are specified as the overlap between /CS=”L” /WR and /RD=”L” PT6314 V1.3 Symbol Condition tRH8 tRS8 tCYC8 tCCLW ...
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... STB pulse width Wait time Output data delay time Output data hold time Reset pulse width SERIAL I/F (INPUT) STB tWHK tWLK tHSTBK SCK SI PT6314 V1.3 Symbol tCYK tWHK tWLK tHSTBK STB↓ → SCK↓ tDS tDH tDKSTB SCK↑ → STB↑ ...
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... SO Notes: 1. Input Signal Rise Time and Fall Time (tF, tR) < 15 ns. 2. All timing is specified using 0.20VDD1 and 0.80VDD1 as reference. AC MEASUREMENT POINT INPUT OUTPUT RESET /RESET PT6314 V1.3 tCYK tODH VIH VOH Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw ...
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... Dot Character VFD Controller/Driver IC TIMING 4 REQUIREMENTS (Unless otherwise specified, Ta=-40 to +85 ℃ ) M68 & I80 Serial Interface Common Timing: Power ON RESET (VDD1=5.0 ± 10%) Parameter Reset time VDD rising time VDD off width VDD 0.2V PT6314 V1.3 Symbol Condition tRES VDD trDD VDD tOFF VDD tOFF ...
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... Dot Character VFD Controller/Driver IC ENGLISH/JAPANESE CHARACTER FONT TABLE (PT6314-001) PT6314 V1 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT6314 March, 2006 ...
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... Dot Character VFD Controller/Driver IC ENGLISH/EUROPEAN CHARACTER FONT TABLE (PT6314-002) PT6314 V1 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT6314 March, 2006 ...
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... Dot Character VFD Controller/Driver IC SPECIAL CHARACTER FONT TABLE (PT6314-16) PT6314 V1 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT6314 March, 2006 ...
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... Dot Character VFD Controller/Driver IC APPLICATION CIRCUIT 1: SERIAL INTERFACE 143 142 141 15 14 MCU 50V PT6314 V1.3 143 142 141 GR1 GR2 GR3 dot x 24Grid x 2 Line VFD SG2 SG3 39 40 GR2 GR3 SI/SO SCK STB PT6314 RL1 RL2 /CLR 1 36 ...
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... Dot Character VFD Controller/Driver IC APPLICATION CIRCUIT 2: I80 INTERFACE 143 142 141 MCU 50V PT6314 V1.3 143 142 141 GR1 GR2 GR3 dot x 24Grid x 2 Line VFD SG2 SG3 39 40 GR2 GR3 /WR RS /RD DB0 PT6314 DB7 RL1 RL2 /CLR ...
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... Dot Character VFD Controller/Driver IC APPLICATION CIRCUIT 3: M68 INTERFACE 143 142 141 MCU 50V PT6314 V1.3 143 142 141 GR1 GR2 GR3 dot x 24Grid x 2 Line VFD SG2 SG3 39 40 GR2 GR3 R DB0 PT6314 DB7 RL1 RL2 /CLR ...
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... Dot Character VFD Controller/Driver IC ORDERING INFORMATION Order Part Number PT6314-001 PT6314-002 PT6314-16 PT6314-001 (L) PT6314-002 (L) PT6314-16 (L) Notes: 1. (L), (C) or (S) =Lead Free. 2. The Lead Free mark is put in front of the date code. PT6314 V1.3 Package Type Top Code 144 Pins, LQFP PT6314-001 144 Pins, LQFP ...
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... Dot Character VFD Controller/Driver IC PACKAGE INFORMATION 144 PINS, LQFP (BODY SIZE 20MM, PITCH SIZE: 0.50MM, THK BODY: 1.40MM) -A- θ 1 θ θ 2 -H- S θ 3 PT6314 V1 - GAUGE PLANE 0.25mm Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw ...
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... Minimum space between protrusion and an adjacent lead is 0.07mm for 0.4mm and 0.5mm pitch packages defined as the distance from the seating plane to the lowest point on the package body. 9. Refer to JEDEC STD MS-026 Variation BFB JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION PT6314 V1.3 Min. Nom ...