ML2731CT Micro Linear, ML2731CT Datasheet - Page 4

• Manufacturer Part Number: ML2731CT
• Description: PA Bias Controller
• Manufacturer: Micro Linear

4
PIN CONFIGURATION
PIN DESCRIPTIONS
Pin #
10
11
1
2
3
4
5
6
7
8
9
Signal Name
NEGEN
VBIAS
REGO
CLKO
VNEG
ICON
SINO
PAEN
GND
VCC
C2
PRELIMINARY DATASHEET
O (ANLG)
O (ANLG)
O (ANLG)
O (ANLG)
O (ANLG)
O (ANLG)
I (CMOS)
I (CMOS)
I (CMOS)
I (ANLG)
GND
I/O
NEGEN
VBIAS
REGO
ICON
CLKO
PAEN
SINO
VCC
PRELIMINARY
Sine wave output. This pin is a low impedance output capable of
driving a 2k
interfaced with on-chip components through XOIN (pin 15) and XOUT
(pin 16) or with a completely external oscillator through pin 15.
Taking PDN (pin 14) high switches off output
DC power supply
IC regulator output. This is the output from the on IC regulator. It is
disabled in the SLEEP mode of operation and enabled in all other
modes. The nominal output voltage is 2.9 V and it has a low
impedance output which can source up to 50mA
PA bias voltage output. This output has limited drive capability of 3mA
and is intended to drive the gate or bias of the PA
Reference current input. Used by the PA bias control loop to set the PA
current level. This input appears as a virtual ground
PA Enable. Transitions from high to low on this pin activate the PA
current ramp up function, switch the PA voltage supply switch on and
enable the PA bias control loop. Transitions from low to high activate
the PA current ramp down function and switch the PA voltage supply
off
Negative Voltage Enable. In conjunction with PDN and PAEN, NEGEN
controls the operational mode of the IC and enables the negative
voltage generator circuits
Clock output. The frequency is set with either a crystal interfaced with
on-chip components through XOIN (pin 15) and XOUT (pin 16) or with
a completely external oscillator through pin 15. CLKO switches off
when device goes into SLEEP mode when PDN is taken high
Ground
Negative regulator output. This pin is one of the outputs of the negative
switching regulator. A capacitor connected serves as a current
reservoir. Typically a 100nF capacitor is connected between pin 10
and GND
Noise Shunt. Negative voltage generator capacitor connection. This
output of the negative switching regulator shunts regulator noise to
ground using a 100nF bypass capacitor
1
2
3
4
5
6
7
8
16-Pin TSSOP (T16)
TOP VIEW
ML2731
January, 2000
load. The signal is sourced with either a crystal
16
15
14
13
12
11
10
9
Description
XOUT
XIN
PDN
VPA
C1
C2
VNEG
GND
ML2731