K7R641884M SAMSUNG [Samsung semiconductor], K7R641884M Datasheet - Page 13

• Manufacturer Part Number: K7R641884M
• Description: 2Mx36 & 4Mx18 QDRTM II b4 SRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

K7R643684M
TIMING WAVE FORMS OF READ AND NOP
K7R641884M
K
K
SA
R
Q
(Data Out)
C
C
CQ
CQ
Note: 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
TIMING WAVE FORMS OF WRITE AND NOP
Note: 1. D1-1 refers to input to address A1+0, D1-2 refers to input to address A1+1, i.e the next internal burst address following A1+0.
K
K
SA
W
D(Data In)
2. Outputs are disabled one cycle after a NOP.
t
IVKH
2. BWx assumed active.
A1
READ
t
KHIX
t
KHKL
t
KHKL
t
KHKH
t
IVKH
t
KHKH
A1
WRITE
t
KLKH
t
KHIX
t
t
KLKH
KHKL
t
KHKH
t
KHKH
t
t
KHKH
KLKH
t
KHCH
D1-1
t
CHQX
t
t
CHCQV
CHQV
t
t
AVKH
KHKH
1
t
CHCQX
A2
t
Q1-1
CQHQV
READ
D1-2
t
KHAX
t
CHQV
t
AVKH
Q1-2
D1-3
t
A2
CHQX
- 13 -
WRITE
t
CQHQX
t
t
KHAX
KHIX
2Mx36 & 4Mx18 QDR
Q1-3
D1-4
t
CHCQV
t
CHCQX
t
Q1-4
DVKH
D2-1
Q2-1
NOP
D2-2
t
KHDX
Q2-2
D2-3
Don t Care
NOP
TM
Don t Care
Preliminary
II b4 SRAM
Q2-3
NOP
D2-4
t
CHQZ
Undefined
Oct. 2004
Q2-4
Undefined
Rev 0.5
NOP