MACH111-14 AMD [Advanced Micro Devices], MACH111-14 Datasheet - Page 22
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MACH111-14
Manufacturer Part Number
MACH111-14
Description
High-Performance EE CMOS Programmable Logic
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.MACH111-14.pdf
(28 pages)
POWER-UP RESET
The MACH devices have been designed with the capability to reset during system power-up.
Following power-up, all flip-flops will be reset to LOW. The output state will depend on the logic
polarity. This feature provides extra flexibility to the designer and is especially valuable in simplifying
state machine initialization. A timing diagram and parameter table are shown below. Due to the
synchronous operation of the power-up reset and the wide range of ways V
state, two conditions are required to insure a valid power-up reset. These conditions are:
1. The V
2. Following reset, the clock input must not be driven from LOW to HIGH until all applicable input
22
and feedback setup times are met.
Parameter Symbol
Registered
CC
t
t
WL
PR
t
Output
S
Power
Clock
rise must be monotonic.
Parameter Descriptions
Power-Up Reset Time
Input or Feedback Setup Time
Clock Width LOW
4 V
Power-Up Reset Waveform
MACH111-5/7/10/12/15
t
PR
t
WL
t
S
See Switching Characteristics
Max
10
CC
can rise to its steady
V
CC
Unit
s
20420B-16