PLS159 PHILIPS [NXP Semiconductors], PLS159 Datasheet - Page 7

• Manufacturer Part Number: PLS159
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors Programmable Logic Devices
TIMING DIAGRAMS
October 22, 1993
(OUTPUTS)
(OUTPUTS)
(INPUTS)
Programmable logic sequencer
(16
(OUTPUT
ENABLE)
(INPUTS)
V
CLK
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
I, B
CC
I, B
I, B
F
B
(OUTPUTS)
45
(INPUTS)
1.5V
CLK
I, B
4.5V
OE
t
PPR
F
12)
1.5V
1.5V
1.5V
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç
t
PD
t
t
IS1
IS1
+1.5V
1.5V
1.5V
Flip-Flop Outputs
t
OE2
1.5V
Power-On Reset
Gate Outputs
t
t
CKO
CKO
1.5V
t
t
t
OE1
IH1
IH1
t
t
CKH
CKH
1.5V
1.5V
t
t
CKP
CKP
1.5V
1.5V
1.5V
1.5V
t
t
IS1
IS1
t
t
+1.5V
CKL
CKL
t
1.5V
OD1
t
OD2
V
1.5V
T
1.5V
31
V
T
+3V
0V
+3V
0V
V
V
+3V
0V
OH
OL
+5V
0V
V
V
+3V
0V
+3V
0V
OH
OL
+3V
0V
V
V
+3V
0V
OH
OL
TIMING DEFINITIONS
SYMBOL PARAMETER
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CKH
CKL
CKP
PRH
IS1
IS2
IH1
IH2
CKO
OE1
OD1
PPR
PD
OE2
OD2
PRO
Width of input clock pulse.
Interval between clock pulses.
Clock period.
Width of preset input pulse.
Required delay between
beginning of valid input and
positive transition of clock.
Required delay between
beginning of valid input forced
at flip-flop output pins, and
positive transition of clock.
Required delay between
positive transition of clock and
end of valid input data.
Required delay between
positive transition of clock and
end of valid input data forced
at flip-flop output pins.
Delay between positive
transition of clock and when
outputs become valid (with
OE Low).
Delay between beginning of
Output Enable Low and when
outputs become valid.
Delay between beginning of
Output Enable High and
when outputs are in the
OFF-State.
Delay between V
power-on) and when flip-flop
outputs become preset at “1”
(internal Q outputs at “0”).
Propagation delay between
combinational inputs and
outputs.
Delay between predefined
Output Enable High, and
when combinational outputs
become valid.
Delay between predefined
Output Enable Low and when
combinational outputs are in
the OFF-State.
Delay between positive
transition of predefined
Preset/Reset input, and
when flip-flop outputs become
valid.
Product specification
PLS159A
CC
(after