EM78156EAS EMC [ELAN Microelectronics Corp], EM78156EAS Datasheet - Page 9

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EM78156EAS

Manufacturer Part Number
EM78156EAS
Description
8-Bit Microcontroller with MASK ROM
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
4.1.3 R2 (Program Counter) & Stack
Depending on the device type, R2 and hardware stack are 10-bit wide. The
structure is depicted in Fig.3.
Generating 1024×13 bits on-chip ROM addresses to the relative programming
instruction codes. One program page is 1024 words long.
R2 is set as all "0"s when under RESET condition.
"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows PC to go to any location within a page.
"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into
the stack. Thus, the subroutine entry address can be located anywhere within a
page.
"RET" ("RETL k", "RETI") instruction loads the program counter with the contents
of the top-level stack.
"ADD R2,A" allows the contents of ‘A’ to be added to the current PC, and the ninth
and tenth bits of the PC are cleared.
"MOV R2,A" allows to load an address from the "A" register to the lower 8 bits of
the PC, and the ninth and tenth bits of the PC are cleared.
Any instruction that writes to R2 (e.g. "ADD R2,A", "MOV R2,A", "BC R2,6",⋅⋅⋅⋅⋅) will
cause the ninth and tenth bits (A8~A9) of the PC to be cleared. Thus, the
computed jump is limited to the first 256 locations of a page.
All instruction are single instruction cycle (fclk/2 or fclk/4) except for the instruction
that would change the contents of R2. Such instruction will need one more
instruction cycle.
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
PC (A9 ~ A0)
Fig. 3 Program Counter Organization
On-chip Program
Interrupt Vector
Reset Vector
Memory
8-Bit Microcontroller with MASK ROM
000H
008H
3FFH
EM78156E
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