W245 CYPRESS [Cypress Semiconductor], W245 Datasheet
W245
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W245 Summary of contents
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... Pins marked with ^ are internal pull-down resistors with Spread Spectrum weak 250 k Output 2. Pins marked with * are internal pull-up resistors with weak (EMI suppressed • 3901 North First Street • San Jose W245-30 = 3.3V±0.3V DD < 120 MHz in [1, 2] SSOP X1 REFOUT ...
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... I Clock pin for SMBus circuitry. I/O Data pin for SMBus Circuitry. P Power Connection: Connected to 3. power supply. P Analog Power Connection: Connected to 3. power supply. G Ground Connection: Connect all ground pins to the common ground plane. W245-30 Pin Description Page ...
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... Suggested Setting Alternate Setting Maximum EMI reduction Overview The W245-30 product is one of a series of devices in the Cy- press PREMIS family. The PREMIS family incorporates the latest advances in PLL spread spectrum frequency synthesiz- er techniques. By frequency modulating the output with a low frequency carrier, peak EMI is greatly reduced. Use of this technology allows systems to pass increasingly difficult EMI testing without resorting to costly shielding or redesign ...
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... Clock Input Freq. Reference Input Divider Q Document #: 38-07229 Rev Phase Charge Detector Pump Modulating Waveform Feedback Divider P PLL GND Figure 1. Functional Block Diagram W245-30 CLKOUT Post (EMI suppressed) VCO Dividers Page ...
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... Figure 3 details the Cypress spreading pattern. Cypress does offer options with more spread and greater EMI reduction. Contact your local Sales representative for details on these devices. EMI Reduction Spread Spectrum Enabled Figure 3. Typical Modulation Profile W245-30 Non- Spread Spectrum Frequency Span (MHz) Down Spread Page ...
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... Bytes are written in the order shown in Table 4. Description Bit Sequence Commands the W245-30 to accept the bits in Data Bytes 0-6 for internal register configuration. Since other devices may exist on the same com- mon serial data bus necessary to have a specific slave address for each potential receiver ...
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... W245-30 Bit Control 0 1 Default -- -- ...
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... W245-30 Bit Control 0 1 Default -- -- 0 Refer to Table 1 0 Refer to Table 1 0 Refer to Table 1 0 Refer to Table 1 0 Hardware Software 0 PLL Off ...
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... Test Condition First locked clock cycle after Power Good Note 4 Note 4 @ 0.4V 3. 2.4V 3.3V DD Rating –0.5 to +7.0 –65 to +150 0 to +70 –55 to +125 0.5 [4] Min. Typ. Max 0.8 2.4 0.4 2.4 -100 250 25 W245-30 Unit V °C °C °C W Unit Page ...
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... Power Good Note 4 Note 4 @ 0.4V 2.4V 0°C to +70° 3.3V ±0.3V or 5V±10 Test Condition Input Clock Spread Off 15-pF load, 0.8V–2.4V 15-pF load, 2.4V–0.8V 15-pF load Package Type W245-30 Min. Typ. Max 0.15V DD 0.7V DD 0.4 2.4 100 250 25 Min. Typ. ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. W245-30 51-85077-*C ...
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... Document Title: W245-30 Frequency Multiplying, Peak Reducing EMI Solution Document Number: 38-07229 Issue REV. ECN NO. Date ** 110494 01/07/02 *A 117404 08/19/02 *B 122693 12/27/02 Document #: 38-07229 Rev. *B Orig. of Change SZV Change from Spec number: 38-00912 to 38-07229 RGL Corrected the Ordering Information to match the DevMaster RBI Added power up requirements to maximum rating information. ...