BC41B143A-ds-001Pe CSR, BC41B143A-ds-001Pe Datasheet - Page 86
BC41B143A-ds-001Pe
Manufacturer Part Number
BC41B143A-ds-001Pe
Description
Blue Core ROM
Manufacturer
CSR
Datasheet
1.BC41B143A-DS-001PE.pdf
(102 pages)
- Current page: 86 of 102
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10.11.1 Pin States on Reset
Table 10.13 shows the pin states of BlueCore4-ROM on reset.
Pin Name
PIO[11:0]
PCM_OUT
PCM_IN
PCM_SYNC
PCM_CLK
UART_TX
UART_RX
UART_RTS
UART_CTS
USB_DP
USB_DN
SPI_CSB
SPI_CLK
SPI_MOSI
SPI_MISO
AIO[2:0]
RESET
RESETB
TEST_EN
AUX_DAC
TX_A
TX_B
RF_IN
XTAL_IN
XTAL_OUT
10.11.2 Status after Reset
The chip status after a reset is as follows:
Note:
BC41B143A-ds-001Pe
(1)
!
!
Cold Reset constitutes one of the following:
!
!
!
Warm Reset: Baud rate and RAM data remain available
Cold Reset
Power cycle
System reset (firmware fault code)
Reset signal, see Section 10.11.
(1)
: Baud rate and RAM data not available
Input with weak pull-down
Input with weak pull-up
Input with weak pull-down
Output tri-stated with weak pull-down
Output, driving low
High impedance
High impedance
State: BlueCore4-ROM
Tri-stated with weak pull-down
Input with weak pull-down
Input with weak pull-down
Input with weak pull-down
Output tri-stated with weak pull-up
Input with weak pull-down
Output tri-stated with weak pull-up
Input with weak pull-down
Input with weak pull-down
Input with weak pull-down
Input with weak pull-down
Input with weak pull-down
Input with weak pull-up
Input with strong pull-down
High impedance
High impedance
High impedance, 250k to XTAL_OUT
High impedance, 250k to XTAL_IN
Table 10.13: Pin States of BlueCore4-ROM on Reset
This material is subject to CSR’s non-disclosure agreement
© Cambridge Silicon Radio Limited 2005
Production Information
Device Terminal Descriptions
Page 86 of 102
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