89C51IC2-CM ATMEL [ATMEL Corporation], 89C51IC2-CM Datasheet - Page 22
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89C51IC2-CM
Manufacturer Part Number
89C51IC2-CM
Description
8-bit Flash Microcontroller with 2-wire Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.89C51IC2-CM.pdf
(146 pages)
- Current page: 22 of 146
- Download datasheet (2Mb)
Figure 6. Mode Switching Waveforms
22
AT89C51IC2
XTALA1
XTALA1:2
X2 bit
CPU clock
STD Mode
The X2 bit in the CKCON0 register (see Table 19) allow to switch from 12 clock periods
per instruction to 6 clock periods and vice versa. At reset, the speed is setting according
to X2 bit of Hardware Security Byte (HSB). By default, Standard mode is actived. Setting
the X2 bit activates the X2 feature (X2 mode).
The T0X2, T1X2, T2X2, UartX2, PcaX2, WdX2 and I2CX2 bits in the CKCON0 register
(See Table 19.) and SPIX2 bit in the CKCON1 register (see Table 20) allow to switch
from standard peripheral speed (12 clock periods per peripheral clock cycle) to fast
peripheral speed (6 clock periods per peripheral clock cycle). These bits are active only
in X2 mode.
More information about the X2 mode can be found in the application note "How to take
advantage of the X2 features in TS80C51 microcontroller?"
F
OSCA
X2 Mode
STD Mode
4301A–8051–01/04
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