IC62LV256 ICSI [Integrated Circuit Solution Inc], IC62LV256 Datasheet - Page 5

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IC62LV256

Manufacturer Part Number
IC62LV256
Description
32K x 8 Low Power SRAM with 3.3V
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet

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IC62LV256
READ CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
AC TEST LOADS
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
Symbol
t
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1a.
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
(3)
(3)
(2)
(2)
(2)
(2)
OUTPUT
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power-Up
CE to Power-Down
3.3V
Including
100 pF
jig and
scope
Figure 1a.
1213 Ω
See Figures 1a and 1b
1378 Ω
0V to 3.0V
Min.
45
1.5V
2
0
3
0
Unit
5 ns
0
0
-45 ns
Max.
20
45
45
25
20
30
OUTPUT
3.3V
(1)
(Over Operating Range)
Including
Min.
jig and
70
scope
2
0
0
3
0
0
5 pF
Figure 1b.
-70 ns
1213 Ω
Max.
70
70
35
25
25
50
1378 Ω
Min.
100
2
0
0
3
0
0
-100 ns
Max.
100
100
50
25
25
50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5

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