G696H250T1U GMT [Global Mixed-mode Technology Inc], G696H250T1U Datasheet - Page 8
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G696H250T1U
Manufacturer Part Number
G696H250T1U
Description
Microprocessor Reset IC
Manufacturer
GMT [Global Mixed-mode Technology Inc]
Datasheet
1.G696H250T1U.pdf
(11 pages)
Pin Description
Detailed Description
A microprocessor ’ s ( µ P ’ s) reset input starts the µ P in a
known state. The G697L/G696L/G696H assert reset to
prevent
power-down, or brownout conditions. They assert a
reset signal whenever the V
below a preset threshold (V
time delay set by capacitor connected to C
V
(V
and the G696L/G696H have a push-pull output stage.
Connect a pull-up resistor on the G697L ’ s RESET out-
put to any supply between 0 and 5.5V.
The time delay is set by external capacitor C
internal pull up current I
pin exceeds the buffer threshold, typically 1.25V, the
age detector and buffer have built-in hysterisis to
prevent erratic reset operation. The formula of time
delay is T (ms) ≅ 1685 C
timing deagram and a Functional Block.
Figure3.
Ensuring a Valid Reset Output Down to V
When V
no longer sinks current-it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since
most µ P and other circuitry is inoperative with
below 0.8V. However, in applications where RESET
Ver: 1.8
May 10, 2006
RESET output high (RESET output low). The volt-
PIN
CC
1
2
3
4
5
TH-
+V
has risen above the high reset threshold V
RESET
HYS
CC
RESET (G696H)
code-execution
RESET
). The G697L uses an open-drain output,
falls below 0.8V, the G696 RESET output
(G696L/G697L)
NAME
Global Mixed-mode Technology Inc.
VCC
GND
G696
G696
NC
CD
GND
GND
VCC
VCC
Valid to V
RESET
RESET
D
CD
( µ F). Fig1 and Fig2 show a
after V
RESET Output remains high while V
after V
Supply Voltage (+5V, +3.3V, +3.0V)
Ground
No Connection.
External Programmable time delay is set by the capacitor connect to C
RESET
errors
TH-
. When the voltage at C
CC
CC
), keeping it asserted for
R1
R1
100k
100k
= Ground Circuit
supply voltage declines
CC
CC
Output remains low while V
rises above the reset threshold.
rises above the reset threshold.
during
D
CC
power-up,
pin, after
= 0
D
, and
VCC
TH+
D
8
CC
Figure 4. Interfacing to µ Ps with Bidirectional Re-
must be valid down to 0V, adding a pull-down resistor
to RESET causes any stray leakage currents to flow
to ground, holding RESET low (Figure 4). R1 ’ s value
is not critical ; 100k Ω is large enough not to load
A 100k Ω pull-up resistor to V
for the G697L if RESET is required to remain valid
for V
Figure 5. G697L Open-Drain
CC
RESET and small enough to pull RESET to ground.
is below the reset threshold, and for delay time set by C
V
V
is below the reset threshold, and for delay time set by C
CC
CC
CC
FUNCTION
< 0.8V.
set I/O
G697
G697
G697
G697
G697
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
Use with Multiple Supplies
VCC
VCC
VCC
GND
GND
GND
GND
GND
VCC
VCC
RESET
RESET
RESET
RESET
RESET
G696/G697
R
R
R
R
R
R
D
PULL-UP
PULL-UP
PULL-UP
PULL-UP
PULL-UP
PULL-UP
pin.
R
R
PULL-UP
PULL-UP
CC
RESET
is also recommended
RESET
RESET
RESET
RESET
RESET
RESET
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
RESET
RESET
INPUT
INPUT
http://www.gmt.com.tw
5V SYSTEM
5V SYSTEM
5V SYSTEM
5V SYSTEM
5V SYSTEM
5V SYSTEM
TEL: 886-3-5788833
+5.0
+5.0V
+5.0
+5.0V
+5.0
+5.0V
Output Allows
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
µP
µP
MOTOROLA
MOTOROLA
VCC
VCC
GND
GND
68HCXX
68HCXX
D
D