H6061 EMMICRO [EM Microelectronic - MARIN SA], H6061 Datasheet - Page 5

• Manufacturer Part Number: H6061
• Description: 3 V Self Recovering Watchdog
• Manufacturer: EMMICRO [EM Microelectronic - MARIN SA]

Pin Description
Functional Description
Thresholds and Outputs
The H6061 has open-drain outputs and voltage thresholds
on pin V
Internal Voltage Comparators
The voltage comparators detect the voltage applied to pin
V
H6061 is designed for monitoring regulated DC voltages
and has bandgap thresholds independent of V
reaction of the H6061 to voltage changes on pin V
in Fig. 4. During powering-up, the outputs are active. After
V
short debounce time T
initialization time T
outputs go inactive. Thereafter, when the voltage on pin V
falls below the V
first warning. If V
signals go active and are guaranteed down to 1.6 V. The
reset outputs react also to timeouts (see “Timer clearing”).
Note that when the supply voltage V
V
allowed voltage of V
Voltage Programming
The H6061 was designed to give the best compromise in
normal usage (see Table 3). Its voltage threshold can be
programmed
potentiometer to react at proportionally higher voltage levels
(see Fig. 8 below).
Voltage Programming
Copyright © 2004, EM Microelectronic-Marin SA
Pin Name
1
2
3
4
5
6
7
8
IN
IN
OFF
and compare it with thresholds V
reaches the V
(about 2.2 V), all outputs are in the active state for any
V
RC
V
RES
V
RES
TCL
SAVE
IN
SS
DD
IN
of typically 1.5 V.
R
Function
Voltage monitoring input
Timer clear input signal
RC oscillator tuning input
GND terminal
Reset output, open drain
Save output, open drain
Positive reset output, open drain
Positive supply voltage
by
IN
SL
SH
then drops below the V
TO
IN
an
level, pin SAVE goes active low as a
.
level, pin SAVE deactivates after a
then passes before the two reset
DB
external
to allow for fast ramp-ups. The
resistor
SH
DD
, V
is below the level
RL
SL
level, the reset
divider
and V
IN
DD
is given
RL
Table 6
. The
or
. The
IN
a
5
Timer Programming
A single timeout period T
duration
unconnected, the on-chip RC oscillator and divider chain
give a timeout period T
V
lengthen it (see Fig. 11). An approximation for calculating
trial values given in milliseconds by the formula:
Choice of component values must be determined in
practice. To have a square wave of period 2T
connect pin TCL to V
from a reset pin.
Timer Clearing
A negative edge or pulse at the TCL input longer than 150
ns will clear the timer and deactivate the reset outputs under
normal running conditions (see Fig. 3). TCL will however
have no effect either when V
initialization period before the deactivation of the reset pins.
Combined Voltage and Timer Action
In Fig. 6 is a typical sequence of power-up, watchdog run,
and power-down. During initialization the
deactivates one debounce delay time T
above V
whichever happens last. The reset pins only deactivate one
timeout period T
and end the initialization. Note that either V
V
upon recovery. Following initialization, the watchdog timer
will time out after time T
clears it. On timeout the reset pins reactivate for a further
T
pulse will deactivate any timeout reset, and another TCL
pulse must follow within a time T
no TCL pulses come at all, the reset pins go square-wave.
Power-down overrides all this however. A falling voltage on
V
activating the reset pins as soon as V
The H6061 has fixed thresholds and low hysteresis for
monitoring regulated DC lines. Additional protection is
provided in case V
which thereupon activates all outputs at once.
TO
DD
RL
IN
gives a warning SAVE = 0 signal at V
period before deactivating again for another try. A TCL
threshold or V
will shorten this time, and a capacitor to V
R
If R
1 min.
1
SH
T
is in MΩ and C
TO
and
, or when the power line V
= 10 kΩ, C
=
the
TO
⎡
⎢
⎢
⎢
⎢
⎢
⎣
DD
DD
0.75
afterwards to free the watchdog timer
supply falls over about 10% below V
watchdog
1 max.
below V
DD
TO
+
1
TO
TO
4.8
or V
in pF, T
of typically 100 ms. A resistor to
(32
= 1 µF
is used for the initialization reset
unless at least one TCL pulse
+
+
SS
ON
V
C
DD
DD
TO
and take the signal output
1
TO
will cause an initialization
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timeout. With
)
R
•
−
to keep reset inactive. If
1
will be in ms.
1.6
< V
0.8
DD
IN
⎤
⎥
⎥
⎥
⎥
⎥
⎦
OFF
DB
H6061
drops below V
rises above V
• 8.192
IN
IN
after V
or during the
= V
falling below
SAVE
TO
SL
pin
, simply
IN
SS
before
rises
RC
will
pin
ON
RL
ON
,
.