AX88172A ASIX [ASIX Electronics Corporation], AX88172A Datasheet - Page 17

• Manufacturer Part Number: AX88172A
• Description: USB 2.0 to 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

GPIO_1
GPIO_0 / PME
SI_3
SI_2
SI_1
SI_0
USB_LED
TEST0
TEST1
TCLK_EN
TCLK_0
TCLK_1
VCC3R3
GND3R3
V18F
VCCK
VCC3IO
GND
VCC33A_H
GND33A_H
VCC33A_PLL
GND33A_PLL
VCC3A3
GND3A3
VCC18A
GND18A
RXCLK
RXDV
RXD [3:0]
CRS
COL
I5/PD
I5/PD
I5/PD
I5/PD
I5/PD
I5/PD/S
B5/PD
B5/PD
B5/PU
B5/PU
B5/PU
B5/PU
I5/PD
I5/PD
I5/S
I5/S
O5
P
P
P
P
P
P
P
P
P
P
P
P
P
P
External Media Interface: MAC Mode with MII Interface
13, 14, 27, 33,
15, 16, 29, 42,
19, 20,
22, 23
41, 57, 66,
21, 51, 65
55, 56, 76
35
36
37
38
39
40
28
54
53
50
49
48
11
12
10
17
18
31
32
6, 77
9, 80
69
70
74
75
2
3
General Purpose Input/ Output Pin 1. This pin is default as input pin after
power-on reset. This pin is also for Default WOL Ready Mode setting;
please refer to section
General Purpose Input/ Output Pin 0 or PME (Power Management Event).
This pin is default as input pin after power-on reset. GPIO_0 also can be
defined as PME output to indicate wake up event detected. Please refer to
section
UART_RX or SPI_MISO. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
UART_TX or SPI_MOSI. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
I2C_SDA or SPI_SS. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
I2C_SCLK or SPI_SCLK. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
USB Speed indicator: When USB bus is in Full speed, this pin drives high
continuously. When USB bus is in High speed, this pin drives low
continuously. This pin drives high and low in turn (blinking) to indicate
TX data transfer going on whenever the host controller sends bulk out data
transfer.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
3.3V Power supply to on-chip 3.3V-to-1.8V voltage regulator.
Ground pin of on-chip 3.3V-to-1.8V voltage regulator.
1.8V voltage output of on-chip 3.3V-to-1.8V voltage regulator.
Receive Clock. RXCLK is received from PHY to provide timing reference
for the transfer of RXD [3:0] and RXDV signals on receive direction of
MII interface.
Receive Data Valid. RXDV is asserted high when valid data is present on
RXD [3:0]. It is driven synchronously with respect to RXCLK by PHY.
Receive Data. RXD [3:0] is driven synchronously with respect to RXCLK
by PHY.
Carrier Sense. CRS is asserted high asynchronously by the PHY when
either transmit or receive medium is non-idle.
Collision. COL is driven high by PHY when the collision is detected.
Power and Ground Pins
On-chip Regulator Pins
Digital Core Power. 1.8V.
Digital I/O Power. 3.3V.
Digital Ground.
Analog Power for USB transceiver. 3.3V.
Analog Ground for USB transceiver.
Analog Power for USB PLL. 3.3V.
Analog Ground for USB PLL.
Analog Power for Ethernet PHY bandgap. 3.3V.
Analog Ground for Ethernet PHY.
Analog Power for Ethernet PHY and 25Mhz crystal oscillator. 1.8V.
Analog Ground for Ethernet PHY and 25Mhz crystal oscillator.
2.3
USB 2.0 to 10/100M Fast Ethernet Controller
Settings.
17
2.3
Settings.
ASIX ELECTRONICS CORPORATION
AX88772A/AX88172A
2.3
2.3
2.3
2.3
Low-pin-count
Settings.
Settings.
Settings.
Settings.