AX88871AP ASIX [ASIX Electronics Corporation], AX88871AP Datasheet - Page 6

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AX88871AP

Manufacturer Part Number
AX88871AP
Description
10/100BASE Dual Speed Bripeater Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
1.3 Block Diagram
AX88871AP Bripeater
10/100
Q-PHY
10/100
Q-PHY
MII
I/F
MII
I/F
MII
interface
Re-concilia-
tion
Sub-layer
(Port 1 -
Port 7 )
Speed
Detection
circuit
Fig - 1
MUX
Per port Jabber ctl,
auto-partition SM &
Per port Collision ,
Partition counters.
Chip Block Diagram
Elasticity Buffer
for 100Mbps
and 10Mbps
6
Repeater State
Machine of 100Mbps
Repeater State
Machine of 10Mbps
Collision
Handling Logic
for 100Mbps
and10Mbps
ASIX ELECTRONICS CORPORATION
Registers
Cascade
Arbitration Logic
of 100Mbps
(Reserved)
100Mbps
to
10Mbps
Bridge
MIB I/F
(Reserved)

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