16F870 Microchip, 16F870 Datasheet - Page 87
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16F870
Manufacturer Part Number
16F870
Description
Search -----> PIC16F870
Manufacturer
Microchip
Datasheet
1.16F870.pdf
(172 pages)
- Current page: 87 of 172
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10.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
TABLE 10-2:
2003 Microchip Technology Inc.
0Bh,8Bh,
10Bh,18Bh
0Ch
8Ch
1Eh
9Eh
1Fh
9Fh
85h
05h
89h
09h
Legend:
Note 1:
Address
(1)
(1)
A/D Operation During SLEEP
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
These registers/bits are not available on the 28-pin devices.
INTCON
PIR1
PIE1
ADRESH A/D Result Register High Byte
ADRESL
ADCON0
ADCON1
TRISA
PORTA
TRISE
PORTE
Name
REGISTERS/BITS ASSOCIATED WITH A/D
A/D Result Register Low Byte
PSPIE
PSPIF
ADCS1
ADFM
Bit 7
GIE
IBF
—
—
—
(1)
(1)
ADCS0 CHS2
Bit 6
PEIE
ADIF
ADIE
OBF
—
—
—
—
PORTA Data Direction Register
PORTA Data Latch when written: PORTA pins when read
RCIF
RCIE
IBOV
Bit 5
T0IE
—
—
PSPMODE
CHS1
Bit 4
INTE
TXIF
TXIE
—
—
PCFG3
CHS0
RBIE
Bit 3
—
—
—
—
Turning off the A/D places the A/D module in its lowest
current consumption state.
10.6
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted. All A/D input pins are
configured as analog inputs.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
Note:
GO/DONE
PORTE Data Direction bits
CCP1IE
CCP1IF
PCFG2
Bit 2
T0IF
RE2
modified
Effects of a RESET
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To allow the con-
version to occur during SLEEP, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
TMR2IF TMR1IF 0000 -000 0000 -000
TMR2IE TMR1IE 0000 -000 0000 -000
PCFG1
Bit 1
INTF
RE1
PIC16F870/871
—
for
PCFG0
ADON
a
Bit 0
RBIF
RE0
Power-on
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--0- 0000
--11 1111 --11 1111
--0x 0000 --0u 0000
0000 -111 0000 -111
---- -xxx ---- -uuu
POR, BOR
Value on
DS30569B-page 85
Reset.
--0- 0000
Value on
MCLR,
WDT
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