NM9805CV ETC [List of Unclassifed Manufacturers], NM9805CV Datasheet - Page 5

• Manufacturer Part Number: NM9805CV
• Description: PCI + 1284 Printer Port
• Manufacturer: ETC [List of Unclassifed Manufacturers]

Pin Name
Rev. 1.1
nSERR
PAR
nC/BE3
nC/BE2
nC/BE1
nC/BE0
nINTA
EE-CS
EE-CLK
EE-DI
EE-DO
EE-EN
128
120
116
123
115
118
117
31
30
22
32
43
8
Type
I/O
O
O
O
O
O
I
I
I
I
I
I
Description
actions except a special cycle. The minimum duration of nPERR is one clock
cycle.
System Error (open drain). This pin goes low when address parity errors are
detected.
Even Parity. Parity is even parity across AD31-0 and nC/BE3-0. PAR is stable
and valid one clock after the address phase. For data phase, PAR is stable
and valid one clock after either nIRDY is asserted on a write transaction, or
nTRDY is asserted on a read transaction.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE3 applies to byte “3”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE2 applies to byte “2”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE1 applies to byte “1”.
Bus Command and Byte Enable. During the address phase of a transaction,
nC/BE3-0 defines the bus command. During data phase, nC/BE3-0 are used
as byte enables. nC/BE0 applies to byte “0”.
PCI active low interrupt output (open-drain). This signal goes low (active)
when an interrupt condition occurs.
External EEprom chip select (active high). After power on reset, Nm9805
reads the EE-Prom and loads the read-only configuration registers sequen-
tially from the first 64 bytes in the EE-Prom.
External EEprom clock.
External EEprom data input.
External EEprom data output.
Enable/Disable external EEprom (active high, internal pull-up). External
EEprom can be disabled when this pin is tied to GND or pulled low. When
external EEprom is disabled, the default values for Nm9805 will be loaded
into PCI configuration register.
PCI + 1284 Printer Port
Nm9805
Page 5