LC51024MV-75F484I Lattice Semiconductor, LC51024MV-75F484I Datasheet - Page 74

• Manufacturer Part Number: LC51024MV-75F484I
• Description: CPLD ispXPLD? 5000MV Family 300K Gates 1024 Macro Cells 200MHz Industrial EECMOS Technology 3.3V 484-Pin FPBGA
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
ispXPLD 5768MX Logic Signal Connections (Continued)
Global Clock LVDS pair options: GCLK0 and GCLK1, as well as GCLK2 and GCLK3, can be paired together to
receive differential clocks; where GCLK0 and GCLK3 are the positive LVDS inputs.
sysIO Bank LVDS Pair
0
0
126N
126P
Primary Macrocell/
Function
S26
S24
Macrocell 1
S13
S12
Alternate Outputs
74
Macrocell 2
-
-
ispXPLD 5000MX Family Data Sheet
Alternate
Inputs
S27
S25
Ball Number
256 fpBGA
—
—
Ball Number
484 fpBGA
C4
D5