ATF15XX-DK3-SAJ44 Atmel, ATF15XX-DK3-SAJ44 Datasheet - Page 29

• Manufacturer Part Number: ATF15XX-DK3-SAJ44
• Description: Adapter Skt Atf15xxbe 84/44plcc
• Manufacturer: Atmel

3605B–PLD–05/06
CPLD Design Flow Tutorial
3.4
3-8
Fit the
Synthesized
Design File
1. Click on the VHDL - Precision button in the Design Flow window to open the
2. In the Logic Synthesis window, check both options to Update Pin Assignments
3. Click on the Compile button to start the compile process. Close the log file when
Note:
In Section 3.3, the logic synthesis portion of the CPLD design flow was completed. On
successful compilation, the Precision tool will produce an EDIF output file (with .EDF
extension). An EDIF file contains the netlist of the optimized and minimized logic equa-
tions. We now need to map this netlist into a specific Atmel CPLD architecture using the
Atmel Fitter.
(2) Check
both options
here
Logic Synthesis window.
after each Compilation and also Run Precision in shell mode:
the synthesis is done successfully.
If you have encountered any syntax error during synthesis, the report file will
pop up to indicate which line of the code contains problem. In such case, you
must correct the syntax problem and save the file before synthesize the code
again before proceeding to the next step.
ATF15xx-DK3 Development Kit User Guide
(1) Open the Logic
Synthesis window