AT45DB321D-SU-2.5 Atmel, AT45DB321D-SU-2.5 Datasheet - Page 10

• Manufacturer Part Number: AT45DB321D-SU-2.5
• Description: memory size:32mbit; supply voltage range:2.5v to 3.6v; memory case style:soic; no. of...
• Manufacturer: Atmel

5.8
6.
6.1
6.1.1
Main Memory Page Program through Buffer
This operation is a combination of the buffer write and buffer to main memory page program with built-in erase operations. Data
are first clocked into buffer 1 or buffer 2 from the input pin (SI), and then programmed into a specified page in the main memory.
To perform a main memory page program through buffer for the standard DataFlash page size (528 bytes), a one-byte opcode,
82H for buffer 1 or 85H for buffer 2, must first be clocked into the device, followed by three address bytes. The address bytes
are comprised of 1 don’t care bit, 13 page address bits, (PA12 - PA0) that select the page in the main memory where data is to
be written, and 10 buffer address bits (BFA9 - BFA0) that select the first byte in the buffer to be written. To perform a main
memory page program through buffer for the binary page size (512 bytes), the 82H opcode for buffer 1 or 85H opcode for buffer
2 must be clocked into the device, followed by three address bytes consisting of 2 don’t care bits, 13 page address bits (A21 -
A9) that specify the page in the main memory to be written, and 9 buffer address bits (BFA8 - BFA0) that select the first byte in
the buffer to be written. After all address bytes are clocked in, the part will take data from the input pins and store them in the
specified data buffer. If the end of the buffer is reached, the device will wrap around back to the beginning of the buffer. When
there is a low-to-high transition on the CS pin, the part will first erase the selected page in main memory to all ones, and then
program the data stored in the buffer into that memory page. Both the erase and the programming of the page are internally
self-timed, and should take place in a maximum time of t
indicate that the part is busy.
Sector Protection
Two protection methods, hardware and software controlled, are provided for protection against inadvertent or erroneous
program and erase cycles. The software controlled method relies on the use of software commands to enable and disable
sector protection, while the hardware controlled method employs the use of the write protect (WP) pin. The selection of which
sectors are to be protected or unprotected against program and erase operations is specified in the nonvolatile sector protection
register. The status of whether or not sector protection has been enabled or disabled by either the software or the hardware
controlled methods can be determined by checking the status register.
Software Sector Protection
Enable Sector Protection Command
Sectors specified for protection in the sector protection register can be protected from program and erase operations by issuing
the enable sector protection command. To enable sector protection using the software controlled method, the CS pin must first
be asserted, as it would be with any other command. Once the CS pin has been asserted, the appropriate four-byte command
sequence must be clocked in via the input pin (SI). After the last bit of the command sequence has been clocked in, the CS pin
must be deasserted, after which the sector protection will be enabled.
Table 6-1.
Figure 6-1. Enable Sector Protection
Command
Enable Sector Protection
CS
SI
Each transition
represents 8 bits
Enable Sector Protection Command
Opcode
Byte 1
Opcode
Byte 2
Opcode
Byte 3
Byte 1
Opcode
EP
Byte 4
3DH
. During this time, the status register and the RDY/BUSY pin will
Byte 2
2AH
Byte 3
Atmel AT45DB321D
7FH
3597Q–DFLASH–6/11
Byte 4
A9H
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