DS1314S-2+TR Maxim Integrated, DS1314S-2+TR Datasheet - Page 10

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DS1314S-2+TR

Manufacturer Part Number
DS1314S-2+TR
Description
Manufacturer
Maxim Integrated
Datasheet
NOTES:
2. All voltages referenced to ground.
3. Measured with outputs open circuited.
4. I
V
5. I
V
6. All inputs within 0.3V of ground or V
7. I
battery-backup mode.
8. Measured with a load as shown in Figure 2.
9. Chip Enable Output (
10.
11.
should be connected to these pins for proper operation. Both
12. t
13. In battery-backup mode, inputs must never be below ground or above V
DC TEST CONDITIONS
Outputs Open
All voltages are referenced to ground
OUTPUT LOAD Figure 2
CCI
CCI
CCO1
CCO1
CCO2
CEO
BW
CE
-0.2V.
-0.3V.
maximum must be met to ensure data integrity on power-down.
is the maximum average load which the DS1314 can supply to attached memories at V
is the maximum average load which the DS1314 can supply to attached memories at V
is the maximum average load current which the DS1314 can supply to the memories in the
and
will be held high for a time equal to t
RST
are open drain outputs and as such cannot source current. External pull-up resistors
CEO
) can only sustain leakage current in the battery-backup mode.
* INCLUDING SCOPE AND JIG CAPACITANCE
CCI
.
REC
10 of 12
after V
AC TEST CONDITIONS
Output Load: See below
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input pulse Rise and Fall Times: 5 ns
CCI
Input: 1.5V
Output: 1.5V
crosses V
BW
and
RST
CCTP
can sink 10 mA.
on power-up.
CCO
.
CCO
CCO

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